I have project, which should be compiled without a problem, but after setting everything , I get this error message :
Makefile:460: *** missing separator. stops
I've checked the line but didn't get where the error could be , here a snap of the code, in which the issue occures:
# Assemble: create object files from assembler source files.
define ASSEMBLE_TEMPLATE
$(OUTDIR)/$(notdir $(basename $(1))).o : $(1)
## #echo
#echo $(MSG_ASSEMBLING) $$< "->" $$#
$(CC) -c $(THUMB) $$(ASFLAGS) $$< -o $$#
endef # here is the line 460
$(foreach src, $(ASRC), $(eval $(call ASSEMBLE_TEMPLATE, $(src))))
any idea how can I solve this , thanks for any hint
Related
I'm trying to create a makefile that compiles all the cpp files in the src directory whenever they change, or whenever a header that they include changes. My problem is that when a file includes enough files to where gcc wraps the rule to a new line, as per the documentation for using the -M options, make treats the line break as another space and the rule tries to create an empty dependency.
For example, running the makefile with a file in the src directory called source.cpp containing:
#include "header1.hpp"
#include "header2.hpp"
#include "header3.hpp"
#include "header4.hpp"
#include "header5.hpp"
will output something along the lines of:
Missing file header1.hpp
Missing file header2.hpp
Missing file header3.hpp
Missing file
Missing file header4.hpp
Missing file header5.hpp
Compiling src/source.cpp...
This is my makefile right now:
SRCDIR = src
OBJDIR = obj
SRCFLS = $(shell find $(SRCDIR) -name *.cpp)
OBJFLS = $(call getobj,$(SRCFLS))
CXXFLAGS = -c -I .
define \n
endef
define \t
endef
define getobj
$(subst $(SRCDIR)/,$(OBJDIR)/,$(subst .cpp,.o,$(1)))
endef
define getrule
$(shell $(CXX) -MM -MG -MT $(call getobj,$(1)) $(1))
endef
default : $(OBJFLS);
% :
#echo Missing file $#
$(eval $(foreach FLE,$(SRCFLS),\
\
$(call getrule,$(FLE))$(\n)$(\t)\
#echo Compiling $$<...$(\n)$(\t)\
#mkdir $$(#D) -p$(\n)$(\t)\
#-$(CXX) $(CXXFLAGS) $$< -o $$#$(\n)\
\
))
Sorry if the question is confusing, I'm willing to clear up any details needed.
For a task, I've got a Makefile provided with this content:
# Flag that states that warnings will not lead to compilation errors
FORCE = false
# Compiler
CC = gcc
# Doc generator
DOC = doxygen
# Include directories
INCLUDES =
# Compiler flags
CFLAGS_FORCE = -c -g -ansi -pedantic -Wall -Wextra
CFLAGS = $(CFLAGS_FORCE) -Werror
# Linker flags
LDFLAGS =
# Source codes
SOURCE = ueb01.c
OBJECTS = $(SOURCE:.c=.o)
# Target name
BINARY = ueb01
.PHONY: all help clean doc doc
default: all
force:
#make FORCE=true
all: $(BINARY)
# Compile a single file
%.o : %.c
#echo " - Building $#"
ifeq ($(FORCE),true)
$(CC) $(CFLAGS_FORCE) $(INCLUDES) -o $# $<
else
$(CC) $(CFLAGS) $(INCLUDES) -o $# $<
endif
#echo " ... done"
# Link files to an executable
$(BINARY): $(OBJECTS)
#echo " - linking $#"
$(CC) $(LDFLAGS) $(OBJECTS) -o $(BINARY)
#echo " ... done"
# Clean the project
clean:
#echo " - delete object all files"
rm -f $(OBJECTS) $(BINARY) *~ doxygen.log
rm -rf doc/
#echo " ... done"
doc:
#echo " - creating documentation"
$(DOC)
#echo " ... done"
# Show help
help:
#echo "Options:"
#echo "make all - create program"
#echo "make clean - clean up"
#echo "make doc - create documentation"
#echo "make force - compile without -Werror (just for 'comfier' development)"
Within same folder as the Makefile, I've got a program.c file that I'd like to execute. The content of that file is not relevant here, because I can't even compile the .c file with the provided Makefile. So when I'm the cmd window and type in make or make all, following lines are being displayed:
MAKE Version 5.4 Copyright (c) 1987, 2010 Embarcadero Technologies, Inc.
Error makefile 45: Command syntax error
Error makefile 46: Command syntax error
Error makefile 47: Command syntax error
Error makefile 48: Command syntax error
Error makefile 49: Command syntax error
Error makefile 50: Command syntax error
*** 6 errors during make ***
The Makefile was provided by my supervisors for the task and works fine as it's supposed to do for my friends but strangely not for me.
I've tried to solve this by installing CMake by Kitware but it gives me the same errors.
I'm running on Windows 10 (64 Bit).
Thanks in advance! T.T
I want to use MinGW to compile C++ codes in win10 using the Makefile below:
# Include platform dependent makefiles
ifeq ($(OS),Windows_NT)
include Makefile.nt
else
include Makefile.unix
endif
PREFIX:=bin/
#############################################################################
# Default target
all: $(PREFIX)rdf3xdump$(EXEEXT) $(PREFIX)rdf3xload$(EXEEXT) $(PREFIX)rdf3xquery$(EXEEXT) $(PREFIX)rdf3xupdate$(EXEEXT) $(PREFIX)rdf3xembedded$(EXEEXT) $(PREFIX)rdf3xreorg$(EXEEXT) $(PREFIX)translatesparql$(EXEEXT) $(PREFIX)buildmonetdb$(EXEEXT) $(PREFIX)buildpostgresql$(EXEEXT)
#############################################################################
# Collect all sources
include cts/LocalMakefile
include infra/LocalMakefile
include makeutil/LocalMakefile
include rts/LocalMakefile
include gtest/LocalMakefile
include test/LocalMakefile
include api/LocalMakefile
ifeq ($(LINEEDITOR),1)
src_lineeditor:=lineeditor/LineInput.cpp lineeditor/LineEditor.cpp lineeditor/Terminal.cpp lineeditor/Display.cpp lineeditor/Buffer.cpp
endif
include tools/LocalMakefile
source:=$(src_cts) $(src_infra) $(src_rts) $(src_tools) $(src_lineeditor)
#############################################################################
# Dependencies
generatedependencies=$(call nativefile,$(PREFIX)makeutil/getdep) -o$(basename $#).d $(IFLAGS) $< $(basename $#)$(OBJEXT) $(genheaders) $(GENERATED-$<)
ifneq ($(IGNORE_DEPENDENCIES),1)
-include $(addprefix $(PREFIX),$(source:.cpp=.d)) $(addsuffix .d,$(basename $(wildcard $(generatedsource))))
endif
#############################################################################
# Compiling
compile=$(CXX) -c $(TARGET)$(call nativefile,$#) $(CXXFLAGS) $(CXXFLAGS-$(firstword $(subst /, ,$<))) $(IFLAGS) $(IFLAGS-$(firstword $(subst /, ,$<))) $(call nativefile,$<)
$(PREFIX)%$(OBJEXT): %.cpp $(PREFIX)makeutil/getdep$(EXEEXT)
$(checkdir)
$(generatedependencies)
$(compile)
#############################################################################
# Cleanup
clean:
find bin -name '*.d' -delete -o -name '*.o' -delete -o '(' -perm -u=x '!' -type d ')' -delete
#############################################################################
# Executable
$(PREFIX)query: $(addprefix $(PREFIX),$(source:.cpp=$(OBJEXT)))
After I type mingw32-make, some error seems to occur:
D:\rdf3x>mingw32-make
/usr/bin/sh: -c: line 1: syntax error: unexpected end of file
makeutil/LocalMakefile:3: recipe for target 'bin/makeutil/getdep.o' failed
mingw32-make: *** [bin/makeutil/getdep.o] Error 1
I also have ever transferred the Makefile to unix-style by dos2unix.
All the makefile and codes are cloned from github: https://github.com/gh-rdf3x/gh-rdf3x. And many other people finished compiling the codes.
How can I fix this problem? My OS is windows10 64bit version, and compiler tool is MinGW
-------------update--------------
Thanks for #MadScientist's remind, file makeutil/LocalMakefile is attached below:
# Separate build rules to avoid cyclic dependencies
$(PREFIX)makeutil/getdep$(OBJEXT): makeutil/getdep.cpp
$(checkdir)
$(compile)
$(PREFIX)makeutil/getdep$(EXEEXT): $(PREFIX)makeutil/getdep$(OBJEXT)
$(buildexe)
$(checkdir) expands to something (you're not showing us what) that isn't a complete shell command.
I'm trying to get started with CuTest to do unit testing in C.
When make-ing, I get the following error:
dev:~/bistro# make
cutest/CuTest.c:10: *** missing separator. Stop.
The file cutest/CuTest.c comes directly from the library. I have done no mods to it. Here are the concerned lines:
08 - #include "CuTest.h"
09 -
10 - /*-------------------------------------------------------------------------*
11 - * CuStr
12 - *-------------------------------------------------------------------------*/
13 -
14 - char* CuStrAlloc(int size)
Here's the Makefile I'm using, for complete reference:
NAME = bistro
SOURCES_DIR = src
OBJECTS_DIR = obj
SOURCES = $(shell find $(SOURCES_DIR) -type f -name *.c) cutest/CuTest.c
OBJECTS = $(patsubst $(SOURCES_DIR)/%.c, $(OBJECTS_DIR)/%.o, $(SOURCES))
DEPS = $(OBJECTS:.o=.d)
CFLAGS = -Wall -Werror -Wextra
COMPILER = gcc -I cutest -I $(SOURCES_DIR) $(CFLAGS)
BISTRO_MAIN = $(OBJECTS_DIR)/bistro/bistro_main.o
.PHONY: test all clean fclean re
all: $(NAME)
# header dependencies
-include $(DEPS)
$(NAME): $(OBJECTS)
$(COMPILER) -o $(NAME) $(OBJECTS)
test: $(filter-out $(BISTRO_MAIN), $(OBJECTS))
$(COMPILER) -c all_tests.c -o all_tests.o
$(COMPILER) -o test $(filter-out $(BISTRO_MAIN), $(OBJECTS)) all_tests.o
rm -f all_tests.o
$(OBJECTS_DIR)/%.o: $(SOURCES_DIR)/%.c
#if [ ! -d "$(#D)" ]; then mkdir -p $(#D); fi
$(COMPILER) -MMD -c $< -o $#
clean:
rm -Rf $(OBJECTS_DIR)/*
fclean: clean
rm -f $(NAME)
re: fclean all
What could be the cause of this error message?
EDIT 1: The makefile is indented with 4-space tabs only. Could the call to the "find" command be the cause of that? Also, how come the error says the missing separator is in the .c file?
EDIT 2: The accepted answer shows the error. In addition, the call did not work because it was searching for *.c, which should be "*.c".
It means you are using (four) spaces instead of tab symbol.
Make target's command must be indented with a tab.
See http://www.gnu.org/software/make/manual/make.html#Rule-Introduction:
Please note: you need to put a tab character at the beginning of every recipe line! This is an obscurity that catches the unwary. If you prefer to prefix your recipes with a character other than tab, you can set the .RECIPEPREFIX variable to an alternate character
Your error comes because you include a C source file into Makefile.
SOURCES = $(shell find $(SOURCES_DIR) -type f -name *.c) cutest/CuTest.c
OBJECTS = $(patsubst $(SOURCES_DIR)/%.c, $(OBJECTS_DIR)/%.o, $(SOURCES)) # cutest/CuTest.c stays cutest/CuTest.c
DEPS = $(OBJECTS:.o=.d)
-include $(DEPS) # oops, includes cutest/CuTest.c
I am getting make file error on line 139 below at $(eval $(RULES))
I am really inexperienced in make file syntax.
This is is error it is giving me when I enter make command.
common.mak:139: *** missing separator. Stop.
I tried to removed the tab by single space, \t nothing works.
Do you know what can be the reason?
Thanks
#
# common bits used by all libraries
#
# first so "all" becomes default target
all: all-yes
ifndef SUBDIR
ifndef V
Q = #
ECHO = printf "$(1)\t%s\n" $(2)
BRIEF = CC CXX HOSTCC HOSTLD AS YASM AR LD STRIP CP
SILENT = DEPCC DEPHOSTCC DEPAS DEPYASM RANLIB RM
MSG = $#
M = #$(call ECHO,$(TAG),$#);
$(foreach VAR,$(BRIEF), \
$(eval override $(VAR) = #$$(call ECHO,$(VAR),$$(MSG)); $($(VAR))))
$(foreach VAR,$(SILENT),$(eval override $(VAR) = #$($(VAR))))
$(eval INSTALL = #$(call ECHO,INSTALL,$$(^:$(SRC_DIR)/%=%)); $(INSTALL))
endif
ALLFFLIBS = avcodec avdevice avfilter avformat avresample avutil postproc swscale swresample
# NASM requires -I path terminated with /
IFLAGS := -I. -I$(SRC_PATH)/
CPPFLAGS := $(IFLAGS) $(CPPFLAGS)
CFLAGS += $(ECFLAGS)
CCFLAGS = $(CPPFLAGS) $(CFLAGS)
ASFLAGS := $(CPPFLAGS) $(ASFLAGS)
CXXFLAGS += $(CPPFLAGS) $(CFLAGS)
YASMFLAGS += $(IFLAGS:%=%/) -Pconfig.asm
HOSTCCFLAGS = $(IFLAGS) $(HOSTCPPFLAGS) $(HOSTCFLAGS)
LDFLAGS := $(ALLFFLIBS:%=$(LD_PATH)lib%) $(LDFLAGS)
define COMPILE
$(call $(1)DEP,$(1))
$($(1)) $($(1)FLAGS) $($(1)_DEPFLAGS) $($(1)_C) $($(1)_O) $<
endef
COMPILE_C = $(call COMPILE,CC)
COMPILE_CXX = $(call COMPILE,CXX)
COMPILE_S = $(call COMPILE,AS)
%.o: %.c
$(COMPILE_C)
%.o: %.cpp
$(COMPILE_CXX)
%.s: %.c
$(CC) $(CPPFLAGS) $(CFLAGS) -S -o $# $<
%.o: %.S
$(COMPILE_S)
%.i: %.c
$(CC) $(CCFLAGS) $(CC_E) $<
%.h.c:
$(Q)echo '#include "$*.h"' >$#
%.ver: %.v
$(Q)sed 's/$$MAJOR/$($(basename $(#F))_VERSION_MAJOR)/' $^ > $#
%.c %.h: TAG = GEN
# Dummy rule to stop make trying to rebuild removed or renamed headers
%.h:
#:
# Disable suffix rules. Most of the builtin rules are suffix rules,
# so this saves some time on slow systems.
.SUFFIXES:
# Do not delete intermediate files from chains of implicit rules
$(OBJS):
endif
include $(SRC_PATH)/arch.mak
OBJS += $(OBJS-yes)
FFLIBS := $(FFLIBS-yes) $(FFLIBS)
TESTPROGS += $(TESTPROGS-yes)
LDLIBS = $(FFLIBS:%=%$(BUILDSUF))
FFEXTRALIBS := $(LDLIBS:%=$(LD_LIB)) $(EXTRALIBS)
EXAMPLES := $(EXAMPLES:%=$(SUBDIR)%-example$(EXESUF))
OBJS := $(sort $(OBJS:%=$(SUBDIR)%))
TESTOBJS := $(TESTOBJS:%=$(SUBDIR)%) $(TESTPROGS:%=$(SUBDIR)%-test.o)
TESTPROGS := $(TESTPROGS:%=$(SUBDIR)%-test$(EXESUF))
HOSTOBJS := $(HOSTPROGS:%=$(SUBDIR)%.o)
HOSTPROGS := $(HOSTPROGS:%=$(SUBDIR)%$(HOSTEXESUF))
TOOLS += $(TOOLS-yes)
TOOLOBJS := $(TOOLS:%=tools/%.o)
TOOLS := $(TOOLS:%=tools/%$(EXESUF))
HEADERS += $(HEADERS-yes)
DEP_LIBS := $(foreach NAME,$(FFLIBS),lib$(NAME)/$($(CONFIG_SHARED:yes=S)LIBNAME))
SRC_DIR := $(SRC_PATH)/lib$(NAME)
ALLHEADERS := $(subst $(SRC_DIR)/,$(SUBDIR),$(wildcard $(SRC_DIR)/*.h $(SRC_DIR)/$(ARCH)/*.h))
SKIPHEADERS += $(ARCH_HEADERS:%=$(ARCH)/%) $(SKIPHEADERS-)
SKIPHEADERS := $(SKIPHEADERS:%=$(SUBDIR)%)
HOBJS = $(filter-out $(SKIPHEADERS:.h=.h.o),$(ALLHEADERS:.h=.h.o))
checkheaders: $(HOBJS)
.SECONDARY: $(HOBJS:.o=.c)
alltools: $(TOOLS)
$(HOSTOBJS): %.o: %.c
$(call COMPILE,HOSTCC)
$(HOSTPROGS): %$(HOSTEXESUF): %.o
$(HOSTLD) $(HOSTLDFLAGS) $(HOSTLD_O) $< $(HOSTLIBS)
$(OBJS): | $(sort $(dir $(OBJS)))
$(HOBJS): | $(sort $(dir $(HOBJS)))
$(HOSTOBJS): | $(sort $(dir $(HOSTOBJS)))
$(TESTOBJS): | $(sort $(dir $(TESTOBJS)))
$(TOOLOBJS): | tools
OBJDIRS := $(OBJDIRS) $(dir $(OBJS) $(HOBJS) $(HOSTOBJS) $(TESTOBJS))
CLEANSUFFIXES = *.d *.o *~ *.h.c *.map *.ver *.ho *.gcno *.gcda
DISTCLEANSUFFIXES = *.pc
LIBSUFFIXES = *.a *.lib *.so *.so.* *.dylib *.dll *.def *.dll.a
define RULES
clean::
$(RM) $(OBJS) $(OBJS:.o=.d)
$(RM) $(HOSTPROGS)
$(RM) $(TOOLS)
endef
$(eval $(RULES))
-include $(wildcard $(OBJS:.o=.d) $(HOSTOBJS:.o=.d) $(TESTOBJS:.o=.d) $(HOBJS:.o=.d))
I experienced that same issue when trying to configure ffmpeg for make.
With the current version of ffmpeg's master branch the issue occurs for common.mak at line 160.
To solve this issue I tried the following steps:
git config core.autocrlf false
delete all *.mak files
git reset --hard
These steps alone did not fully solve my problem. Based on the hints regarding the TAB (\t) characters I changed line 160 from
to
Note the arrow (indicating a TAB) at line 160 between $( and eval $(RULES)).
This TAB solved the problem for me. I had to make this change to a further *.mak file. There was the same error message for another file. By the way, Notepad++ is a great tool to insert a TAB as well as for changing the line endings.
Since ffmpeg takes a while for building I decided to share my solution...
I had this exact same issue - when also checking out FFMPEG on Windows but using git.
After running configure and when trying to run make I got the same line:
common.mak:139: *** missing separator. Stop.
As suggested by #MadScientist - Makefiles are particularly fussy not just about tab (\t) but also the choice of line ending (LF vs. CRLF).
This is down to the GNU make command which has to run them - which seems to only respect LF.
So a *nix version, such as this, will work:
And here is the same file under Windows, which won't work:
(Another giveaway is that it is also bigger with double the bytes at the end of each line!)
Bottom line (so to speak) is that you might have to reformat your files - perhaps by using the dos2unix command.
This would still be the case even if not directly cloning from git - but instead downloading a tar/zip that was itself created from a git clone. The end of lines would be preserved.
Or, if using Git (directly as I was) you have to tell it how to handle the end of line characters. When it checks-out/clones and when it commits.
There is a full description of what this means here: http://adaptivepatchwork.com/2012/03/01/mind-the-end-of-your-line/
And how it can be configured (for the old version of git) via the [core].eol setting.
This is also apparent on Windows, when if you run the installer (e.g. http://git-scm.com/downloads) you get a dialogue such as this:
Selecting the final option to "checkout as-is, commit as-is" fixed it for me. Not perhaps the most principled way, but it forced the LF endings to be preserved.
In makefiles, recipe lines MUST start with a TAB character (TAB must be the first character on the line). You cannot have one or more spaces at the beginning of the line, either with or without a following TAB.
I don't know what you mean by: I tried to removed the tab by single space, \t nothing works; that sentence doesn't make sense to me. Hopefully the above paragraph will help you understand what you need to do.
Be sure you're using a text editor (not a word processor) and that your editor doesn't try to "helpfully" change the formatting in your files.
In general, unless you're more experienced with makefiles I don't recommend using the eval function, which requires a pretty clear understanding of the rules make uses for expanding variables and functions to use correctly. I'm not really sure why you're using eval in the context of the RULES variable, anyway; why not just write the rule directly without eval?