I am new to programming.
I need to help me with hiding a message in makefile.
Let me show you:
When compiling this set of files(grid.cc attribute.cc targa.cc) http://prntscr.com/67ack4
I see this message: gcc5 -Wall -O2 -pipe -mtune=i686 -c attribute.cc
And I want to defend me something like: Compilation targa.cc
And I want to defend me something like: Compilation attribute.cc
etc
etc ...
I hope you understand what I mean.
Here is my makefile :
BIN = ../libgame.a
CXX = gcc5
CFLAGS = -Wall -O2 -pipe -mtune=i686
OBJFILES = grid.o attribute.o targa.o
########################################################################################################
default:
$(CXX) $(CFLAGS) -c grid.cc
$(CXX) $(CFLAGS) -c attribute.cc
$(CXX) $(CFLAGS) -c targa.cc
ar cru $(BIN) $(OBJFILES)
ranlib $(BIN)
rm -f *.o
You can use an automake-style silent rules trick to control what is output for your commands.
To do this directly you would do this:
BIN = ../libgame.a
CXX = gcc5
CFLAGS = -Wall -O2 -pipe -mtune=i686
OBJFILES = grid.o attribute.o targa.o
########################################################################################################
default:
#echo 'Compiling grid.cc';$(CXX) $(CFLAGS) -c grid.cc
#echo 'Compiling attribute.cc';$(CXX) $(CFLAGS) -c attribute.cc
#echo 'Compiling targa.cc';$(CXX) $(CFLAGS) -c targa.cc
ar cru $(BIN) $(OBJFILES)
ranlib $(BIN)
rm -f *.o
Alternatively you could use my silent_rules.mk and use:
$(eval $(call vrule,Compile,Compiling $$(value 1))
$(call Compile,grid.cc);$(CXX) $(CFLAGS) -c grid.cc
$(call Compile,attribute.cc);$(CXX) $(CFLAGS) -c attribute.cc
$(call Compile,targa.cc);$(CXX) $(CFLAGS) -c targa.cc
to get Compiling grid.cc, Compiling attribute.cc and Compiling targa.cc messages instead. (If you were using proper targets for your object files you could use the default $(GEN) silent rule to get GEN xxx.o output automatically.
Related
I've been trying to compile an OS however whenever I attempt to compile it using the make file it only compiles "kernel.c" and I can't seem to figure out why. I need help to figure what's wrong. I've tried everything I could possibly do to fix it at least from my knowledge.
Here's the code:
PROJECT_DIR= ..
CXXFLAGS= -ggdb3 -O0 -Wall -O2 -ffreestanding -nostdinc -nostdlib
CFLAGS=-std=c17
CSRCFLAGS= -O2 -Wall -Wextra
LFLAGS= -ffreestanding -O2 -nostdlib
IMG_PATH= ../
BUILD_BACK_TWO= ../../../build
CFILES= $(wildcard *.c)
OFILES= $(CFILES:.c=.o)
GCCPATH=C:/CrossCompilers/gcc-arm-10.3-2021.07-mingw-w64-i686-aarch64-none-elf
CFLAGSSTART= -ffreestanding -c
CFLAGSEND= -O2 -Wall -Wextra
GCCFLAGS= -Wall -O2 -ffreestanding -nostdinc -nostdlib -nostartfiles
GCCPATHAARCH= $(GCCPATH)/aarch64-none-elf/bin
GCCPATHBIN= $(GCCPATH)/bin
ASMCFLAGS= -f elf32 -F dwarf -g -w+all
ASM= -s
# Location of the files
THIS_DIR := $(dir $(abspath $(firstword $(MAKEFILE_LIST))))
SRC = $(PROJECT_DIR)/src
UI_IMAGES = $(PROJECT_DIR)/images/ui
OBJ_DIR = $(PROJECT_DIR)/build/objects
ASMSOURCES = $(wildcard $(SRC)/*.s)
SOURCES = $(wildcard $(SRC)/*.c)
SOURCES = $(wildcard $(SRC)/$(ARCHDIR)/*.c)
UISOURCES = $(wildcard $(UI_IMAGES)/*.png)
OBJECTS = $(patsubst $(SRC)/%.s, $(OBJ_DIR)/%.o, $(ASMSOURCES))
OBJECTS += $(patsubst $(SRC)/%.c, $(OBJ_DIR)/%.o, $(SOURCES))
OBJECTS += $(patsubst $(SRC)/$(ARCHDIR)/*.c, $(OBJ_DIR)/$(ARCHDIR)%.o, $(SOURCES))
OBJ_KEEP = objects_keep
#Headers
HEADERS = $(PROJECT_DIR)/inc
INCLUDE = -I$(HEADERS)
#File settings
KERNEL_NEEDED=kernel8.img
BASE_KERNEL=base_kernel.img
IMG_NAME=edited_reality
$(OBJ_DIR)/%.o: $(SRC)/%.s
mkdir -p $(#D)
#echo COMPILING $^
$(GCCPATHBIN)/aarch64-none-elf-as -c $^ -o $#
$(OBJ_DIR)/%.o: $(SRC)/%.c
mkdir -p $(#D)
#echo COMPILING $^
$(GCCPATHBIN)/aarch64-none-elf-gcc -ffreestanding $(INCLUDE) $(CFLAGS) -c $^ -o $# -O2 -Wall -Wextra
$(OBJ_DIR)/$(ARCHDIR)/%.o: $(SRC)/$(ARCHDIR)/%.c
mkdir -p $(#D)
#echo COMPILING $^
$(GCCPATHBIN)/aarch64-none-elf-gcc -ffreestanding $(INCLUDE) $(CFLAGS) -c $^ -o $# -O2 -Wall -Wextra
BUILD: $(OBJECTS)
mkdir -p $(#D)
#echo COMPILING $^
$(GCCPATHBIN)/aarch64-none-elf-gcc -nostdlib -T linker.ld -o $(IMG_NAME).elf -ffreestanding -O2 -nostdlib $(OBJECTS) $(INCLUDE) -lgcc
$(GCCPATHBIN)/aarch64-none-elf-objcopy $(IMG_NAME).elf -O binary $(KERNEL_NEEDED)
clean:
rm -rf $(OBJ_DIR)
rm -rf $(IMG_NAME).elf
rm -rf $(IMG_NAME).img
start:
#echo Starting
mkdir $(OBJ_DIR)
#echo .
#echo .
#echo .
.PHONY: clean start BUILD
EDIT: I couldn't figure it out so what I'm doing is just writing a one file C++ program that will compile everything else because that is so much easier (for some reason).
Anyways thanks everyone.
It's not clear whether you mean it runs the compiler one time then stops, or whether it runs the compiler many times but always on the same file. When asking for help please cut and paste the command you typed and the output you got (or the useful parts if there's a lot of it), and describe what is wrong and what you wanted to happen.
But, I think this is just a typo:
OBJECTS += $(patsubst $(SRC)/$(ARCHDIR)/*.c, $(OBJ_DIR)/$(ARCHDIR)%.o, $(SOURCES))
Note here you use $(SRC)/$(ARCHDIR)/*.c when you mean $(SRC)/$(ARCHDIR)/%.c.
You can add things like $(info $(OBJECTS)) to see the value of various variables (or run make -p).
I compiling my C source files with this code:
CC=clang -std=c11
CFLAGS=-Wall -g
ASSEMBLY=-S -masm=intel
OPTIMIZE=-Ofast
FOLDER_SRC=./src/
FOLDER_BIN=./bin/
FOLDER_ASSEMBLY=./ass/
clean:
rm -f \
$(FOLDER_BIN)1.1-hello $(FOLDER_ASSEMBLY)1.1-hello \
$(FOLDER_BIN)1.2-fahrenheit $(FOLDER_ASSEMBLY)1.2-fahrenheit \
$(FOLDER_BIN)1.2-fahrenheit-floating $(FOLDER_ASSEMBLY)1.2-fahrenheit-floating
all:
$(CC) $(CFLAGS) $(OPTIMIZE) $(FOLDER_SRC)1.1-hello.c -o $(FOLDER_BIN)1.1-hello
$(CC) $(CFLAGS) $(OPTIMIZE) $(FOLDER_SRC)1.2-fahrenheit.c -o $(FOLDER_BIN)1.2-fahrenheit
$(CC) $(CFLAGS) $(OPTIMIZE) $(FOLDER_SRC)1.2-fahrenheit-floating.c -o $(FOLDER_BIN)1.2-fahrenheit-floating
assembly:
$(CC) $(ASSEMBLY) $(OPTIMIZE) $(FOLDER_SRC)1.1-hello.c -o $(FOLDER_ASSEMBLY)1.1-hello
$(CC) $(ASSEMBLY) $(OPTIMIZE) $(FOLDER_SRC)1.2-fahrenheit.c -o $(FOLDER_ASSEMBLY)1.2-fahrenheit
$(CC) $(ASSEMBLY) $(OPTIMIZE) $(FOLDER_SRC)1.2-fahrenheit-floating.c -o $(FOLDER_ASSEMBLY)1.2-fahrenheit-floating
I try to implement some kind of loop to write less. I added this code, but it just generating errors:
FILENAME_SRC := $(wildcard $(FOLDER_SRC)*.c)
FILENAME_BUILD := $(patsubst $(FOLDER_SRC)%.c,%,$(FILENAME_SRC))
echo : $(FILENAME_SRC)
#echo $^
#echo $(FILENAME_BUILD)
build : $(FILENAME_SRC)
$(CC) $(CFLAGS) $(OPTIMIZE) $^ -o $(FILENAME_BUILD)
make echo printing this to the console:
$ make echo
src/1.2-fahrenheit.c src/1.1-hello.c src/1.2-fahrenheit-floating.c
1.2-fahrenheit 1.1-hello 1.2-fahrenheit-floating
make build command generating this error:
$ make build
clang -std=c11 -Wall -g -Ofast src/1.2-fahrenheit.c src/1.1-hello.c src/1.2-fahrenheit-floating.c -o 1.2-fahrenheit 1.1-hello 1.2-fahrenheit-floating
clang.exe: error: no such file or directory: '1.1-hello'
clang.exe: error: no such file or directory: '1.2-fahrenheit-floating'
make: *** [Makefile:21: build] Error 1
I want the expected output to look like when I do make all:
$ make all
clang -std=c11 -Wall -g -Ofast ./src/1.1-hello.c -o ./bin/1.1-hello
clang -std=c11 -Wall -g -Ofast ./src/1.2-fahrenheit.c -o ./bin/1.2-fahrenheit
clang -std=c11 -Wall -g -Ofast ./src/1.2-fahrenheit-floating.c -o ./bin/1.2-fahrenheit-floating
Final solution
CC := clang -std=c11
GCC := gcc -std=c11
CFLAGS := -Wall -g
ASSEMBLY := -Wall -S -masm=intel
OPTIMIZE := -O3 -march=native
SRC := $(wildcard src/*.c)
BIN := $(patsubst src/%.c,bin/%,$(SRC))
ASS := $(patsubst src/%.c,ass/%,$(SRC))
clean:
rm -f bin/* ass/*
build: $(BIN)
$(BIN): bin/%: src/%.c
$(CC) $(CFLAGS) $(OPTIMIZE) $^ -o $#
assembly: $(ASS)
$(ASS): ass/%: src/%.c
$(CC) $(ASSEMBLY) $(OPTIMIZE) $^ -o $#
Really sorry for the clean ass/* though, it cannot be called assembly because the similar folder name in the project.
Your all rule needs to look something like
CC := clang
CFLAGS := -std=c11 -Wall -g -Ofast
targets := bin/1.1-hello bin/1.2-fahrenheit bin/1.2-fahrenheit-floating
.PHONY: all
all: $(targets)
$(targets): bin/%: src/%.c
$(LINK.c) $^ $(LDLIBS) -o $#
Here is my makefile :
BIN = ../mylib.a
CXX = g++5
CFLAGS = -O2 -pipe -mtune=i686 -g
#################################
default:
#echo 'Compiling socket' ; $(CXX) $(CFLAGS) -c socket.c
#echo 'Compiling fdwatch'; $(CXX) $(CFLAGS) -c fdwatch.c
#echo 'Compiling signal' ; $(CXX) $(CFLAGS) -c signal.c
#echo 'Compiling heart' ; $(CXX) $(CFLAGS) -c heart.c
#echo 'Create library static'; ar cru $(BIN) *.o
#echo 'Compiling'; ranlib $(BIN)
#echo 'Delete .obj files'; rm -f *.o
So this is my question..
Let's say I have 100 files. I want to compile them.
And I make changes in a particular file.
When I run the command make all those files from 0. And it rebuilds have to wait again until all those it rebuilds.
Now I want to ask how they can change that makefile above that to recompile just that file changed me.
How about
.PHONY: all clean
BIN = ../mylib.a
CXX = g++5
CFLAGS = -O2 -pipe -mtune=i686 -g
#################################
SOURCEFILES=socket.c fdwatch.c signal.c heart.c
all: $(BIN)
clean:
#echo Delete .obj files
#rm -f *.o
%.o: %.c
#echo Compiling $*
#$(CXX) $(CFLAGS) -c $^ -o $#
$(BIN): $(SOURCEFILES:%.c=%.o)
#echo Create static library
#ar cru $(BIN) $^
#echo Compiling
#ranlib $(BIN)
?
I am using the following makefile to build my project:
CC = /usr/bin/g++
CFLAGS = -Wall -pedantic -std=c++0x
LDFLAGS =
OBJ = main.o pnmhandler.o pixmap.o color.o
pnm: $(OBJ)
$(CC) $(CFLAGS) -o pnm $(OBJ) $(LDFLAGS)
%.o: %.c
$(CC) $(CFLAGS) -c $<
As I run make I get the following error:
/usr/include/c++/4.9.1/bits/c++0x_warning.h:32:2: error: #error This
file requires compiler and library support for the ISO C++ 2011
standard. This support is currently experimental, and must be enabled
with the -std=c++11 or -std=gnu++11 compiler options.
As I can read from the following line, the CFLAGS are not properly included, but I have no idea what I am doing wrong:
g++ -c -o main.o main.cpp
Also tried -std=c++11 and -std=gnu++11, without any results. Any ideas?
If I run make -Bn, I get:
g++ -c -o main.o main.cpp
g++ -c -o pnmhandler.o pnmhandler.cpp
g++ -c -o pixmap.o pixmap.cpp
g++ -c -o color.o color.cpp
/usr/bin/g++ -Wall -pedantic -std=c++0x -o pnm main.o pnmhandler.o pixmap.o color.o
EDIT: Replacing the rule %.o: %.c with %.o: %.cpp fixes my problem.
The reason you see
g++ -c -o main.o main.cpp
is that Make is invoking its standard rule to create the object file:
%.o: %.cpp
# recipe to execute (built-in):
$(COMPILE.cpp) $(OUTPUT_OPTION) $<
The command expands to
$(CXX) $(CXXFLAGS) $(CPPFLAGS) $(TARGET_ARCH) -c -o $# $<
Instead of setting CC and CFLAGS in your makefile, you should set CXX and CXXFLAGS, which are meant for C++ rather than C. That allows the built-in rule above to work for you, and then you just need to make sure the right linker is used, e.g. with
pnm: LINK.o=$(LINK.cc)
pnm: $(OBJ)
You also don't need the %.o: %.c rule, as you have no C sources.
Complete Makefile:
CXX = /usr/bin/g++
CXXFLAGS = -Wall -pedantic -std=c++0x
OBJ = main.o pnmhandler.o pixmap.o color.o
pnm: LINK.o=$(LINK.cc)
pnm: $(OBJ)
clean::
$(RM) pnm
.PHONY: clean
I have Makefile in Ubuntu12.10 as below.
when I run it by make command, it shows as
g++ -c -o myprog1.o myprog1.cpp
It seems the variables CFLAGS and CINCLUDE do not work.
Can any one help me to check it?
Thanks,
RM = rm -f
CC = gcc
AR = ar rc
CFLAGS= -Wall -g -O2 -std=c++11 -fPIC
CINCLUDE= -I. -I../include
OBJECTS= myprog1.o myprog2.o
STATIC_LIB = libctest.a
$(STATIC_LIB): $(OBJECTS)
$(AR) $(STATIC_LIB) $(OBJECTS)
%.o : %.c
$(CC) -c $(CFLAGS) $(CINCLUDE) $< -o $#
clean:
$(RM) $(OBJECTS)
$(RM) $(STATIC_LIB)
The problem is that you have a make rule for %.o : %.c but not for %.o : %.cpp. When you run the make, the implicit make rule for '%.cpp' runs, but the implicit rule doesn't contain references to CFLAGS or CINCLUDE.
Since your source is in c++, you probably want to add another rule for c++ compilation and set up the CXX variables appropriately.
CXXFLAGS = $(CFLAGS)
%.o : %.cpp
$(CXX) -c $(CXXFLAGS) $(CINCLUDE) $< -o $#