How to run makefile in Cygwin - makefile

I am trying to run Makefile in cygwin.
Error msg:
$ make /cygdrive/d/IoT/trunk/Macchina/TestBed/Makefile
make.exe: *** No rule to make target `/cygdrive/d/IoT/trunk/Macchina/TestBed/Makefile'. Stop.

You don't give make the makefile as an argument like that.
cd to that directory and run make.
Or if that makefile is intended to be used from other directories as well then you can try make -f /cygdrive/d/IoT/trunk/Macchina/TestBed/Makefile.

Related

Permission denied when running go from Makefile

I'm experiencing some weird permission denied errors that I have no idea where could be coming from.
$ go run .
Hello from go
$ make run
go run .
make: go: Permission denied
make: *** [Makefile:2: run] Error 127
$ make run2
echo "Make says hello" ; go run .
Make says hello
Hello from go
$ cat Makefile
run:
go run .
run2:
echo "Make says hello" ; go run .
$ cat main.go
package main
import "fmt"
func main() {
fmt.Println("Hello from go")
}
My terminal is bash running on Ubuntu 22.04.
What is the difference between my run target and running go directly that can cause a permission denied error?
What's the difference between run and run2 that allow it to work in one but not in the other?
EDIT: Running make with -d / --trace
$ make -d run
<...snip...>
No need to remake target 'Makefile'.
Updating goal targets....
Considering target file 'run'.
File 'run' does not exist.
Finished prerequisites of target file 'run'.
Must remake target 'run'.
go run .
make: go: Permission denied
make: *** [Makefile:2: run] Error 127
$ make --trace run
Makefile:2: target 'run' does not exist
go run .
make: go: Permission denied
make: *** [Makefile:2: run] Error 127
$ make --trace run2
Makefile:5: target 'run2' does not exist
echo "Make says hello"; go run .
Make says hello
Hello from go
This is due to a bug in GNU make (actually it's a bug in gnulib). It means that you have a directory named go, in some directory on your PATH (before the actual directory containing the go executable).
So if you have a directory /usr/bin/go/. and you have /usr/bin on your PATH, you'll see this issue.
You should check your PATH and make sure to remove any directories that contain such subdirectories. If you can't remove that directory from your PATH (it's unusual to need directories containing subdirectories on your PATH but I guess it's possible) and you can't rename the go directory to something else, you'll have to ensure that GNU make invokes a shell, by adding a special character. Just ; is good enough:
run:
go run . ;
The issue you're experiencing is likely due to different environment between your shell and shell executed by Makefile. If for example you have a shell alias for go this alias is not visible to Makefile or if you have a custom path in you're shell rc file it's not visible to Makefile. It's hard to guess where the difference might be.
You might want to try debug the issue by trying following in your Makefile:
echo $(PATH)
command -v go
and run the same commands in your shell and compare results.
Note that the default shell for Makefile is /bin/sh whereas you probably have bash or zsh.
Here's some handy defaults to configure your Makefile build:
LANG=en_US.UTF-8
SHELL=/bin/bash
.SHELLFLAGS=--norc --noprofile -e -u -o pipefail -c

Two different symlinks to the `make` binary: Why different results on invocation?

Setup: macOS, bash, inside tmux. I use make installed via homebrew.
When running make with my Makefile, I get
protoc -I=foo/bar/proto --cpp_out=foo/bar/proto foo/bar/proto/foo.proto
make: *** No rule to make target 'foo/bar/proto/foo.pb.h', needed by 'proto'. Stop.
make: *** Waiting for unfinished jobs....
When I instead run gmake, the program is successful:
protoc -I=foo/bar/proto --cpp_out=foo/bar/proto foo/bar/proto/foo.proto
protoc -I=foo/bar/proto --python_out=foo/bar/proto foo/bar/proto/foo.proto
But the binaries are exactly the same:
$> readlink -f `which make`
/usr/local/Cellar/make/4.2.1_1/bin/gmake
$> readlink -f `which gmake`
/usr/local/Cellar/make/4.2.1_1/bin/gmake
How is this possible?
It was suggested that this question is a duplicate, which doesn't seem to be the case. I am aware, that the system-make is not necessarily GNU make or not a current version. But as proven above, the two commands refer to the exact same binary.

What is the reason for fatal error: *** No rule to make target 'install'. Stop

The error occurs when I tried to run the command make install under Ubuntu 16.04 that
*** No rule to make target 'install'. Stop.
I have already run make command with several errors fatal: bad revision 'HEAD', which didn't lead to halting the command. I have no idea whether these errors matter.
My makefile is:
SUBDIRS := $(wildcard */.)
all: $(SUBDIRS)
$(SUBDIRS):
make -C $#
install:
for dir in $(SUBDIRS); do \
make -C $$dir install; \
done
.PHONY: all $(SUBDIRS)
Specifically, I want to know how the makefile works after install:.
The project should install an APP on the connected phone Nexus 5. But actually, there's no such APP on my phone.
I suppose your Makefile is properly formatted, with tabs where they should be, etc.
Then, when you run make install in the top level directory, your Makefile does have a rule to make the target install: it says to loop on your subdirectories, enter each one of them, and run make install there (this is what the -C option does). One of those sub-makes fails, most probably because, in its respective subdirectory, it doesn’t find a Makefile with an install recipe in it. When the sub-make fails, the loop goes on with the remaining sub-makes (unless the shell was instructed otherwise by means of the -e switch), and the final return code of the whole recipe will be the return code of the last sub-make.
There are some points worth discussing in your Makefile (for example, install should be listed as a .PHONY target), but you don’t provide enough information to clarify them: for example, is it really necessary to have the shell loop through the subdirectories in a particular order? Usually, a better policy is to have make parallelize the sub-makes whenever possible (and, as a side effect, have make stop when the first submake fails...)

Can't get 'make' to work on OSX; have to use 'make -f <file>'

I'm trying to get started building my own make files, but am having some trouble getting my Mac to use them. I can issue the command make -f makefile.txt and it compiles my project fine; however, just using make produces the following:
make: *** No targets specified and no makefile found. Stop.
My makefile looks like this:
all:
g++ main.c -o hello
Am I doing something wrong?
You're naming the Makefile inappropriately. It should be named simply Makefile (with no extension), not makefile.txt.

Why does make tell me "Command not found"?

I have the following simple makefile:
all:
fat_imgen.exe
Where fat_imgen.exe is an executable in the same directory as the makefile. When I try and run this however this happens:
>make
fat_imgen.exe
make: fat_imgen.exe: Command not found
make: *** [all] Error 127
If I run fat_imgen from that same command prompt then it starts as expected - why can't make find fat_imgen.exe?
This is all running under Mingw / Windows.
When using a simple commend like the name of an executable, GNU make will start the executable directly. If the directory where the executable is found is not in the PATH/path, make will fail.
If you put the directory in the path, your makefile should work normally.
Also, as suggested in a comment by #AlexFarber, by adding './' GNU make will assume a more complex command (since not all shells are created equal), and hand the command over to the configured shell. That will work, since the shell is created in the directory where the command is then found.

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