Boot Linux in Normal World - linux-kernel

I am exploring the TrustZone (the ARM security extension) on an i.MX53 Quick Starting Board. I succeeded to make a bare-metal system : A secure world image and a normal world image. I load the two images in my ram with u-boot and I boot the secure world who initializes the monitor system and gives the hand to the normal world image.
I want to use the same system. But this time instead of using a normal world basic image, I would like to use a Linux Kernel Image. I did some configurations that I found in the i.MX53 Reference Manual and the i.MX53 Security Reference Manual when I am in the secure world. The configurations are :
Configure the CSU : CSL0-31 to 0x00FF_00FF
Configure the TZIC (interrupts) TZIC_INTSEC0-3 to 0xFFFF_FFFF, TZIC_PRIORITY0-31 to 0x1F1F_1F1F and TZIC_INTCTRL to 0x8001_0001
Configure Secure Configuration Register : NS=0 IRQ=0 FIQ=0 EA=0 FW=1 AW=1 => 0x30
When I give the hand to the linux kernel, the boot process starts, here is a part of the output :
regulator: core version 0.5
NET: Registered protocol family 16
i.MX IRAM pool: 128 KB#0xec840000
FAILED TO RELEASE IRAM PARTITION
CPU is i.MX0 Revision 0.0
Unhandled fault: external abort on non-linefetch (0x1008) at 0xec82c00c
Internal error: : 1008 [#1] PREEMPT
last sysfs file:
Modules linked in:
CPU: 0 Not tainted (2.6.35.3 #1)
PC is at mxc_cpu_lp_set+0x1c/0x16c
LR is at arch_idle+0x60/0x294
pc : [<8003a958>] lr : [<8003ab08>] psr: 60000093
sp : 80835f78 ip : 00000003 fp : 8088fb68
....
As you can notice in the output, there is a problem with the IRAM (because normally it diplays IRAM READY) and there is a data abort. After so displays related to these errors, the Linux kernel boot process stops.
Any ideas of how to solve that ? Am I missing any configuration ? Thank you

Have you seen this post on the Freescale forum?
It seems to be the exact same problem you're having. Basically, it is probably trying to access a register, at 0xec82c00c virtual address, which is configured by default to be non-accessible from the Normal world.

Related

TwinCAT 3.1 fCoE read and write with Complete Access

I am attempting to perform complete access read and writes to an EtherCAT slave controller using TwincAT 3.1 on Windows 10.
Generated EtherCAT Slave Stack Code using the Beckhoff Slave Stack Code Tool 5.12. Successfully able to enter operational state using TwinCAT 3.1 as EtherCAT master. I have a mailbox object at index 0x8001, which is an array of 25 bytes. I am unable to perform complete access, which allows writing / reading all 25 bytes from the object at 0x8001. Without the complete access, I will have to write to each sub-index of the index 0x8001 individually.This means 25 separate read/ write operation at each sub-index under the object.
I have tried using EC Engineer 3.06 from Acontis technologies as EtherCAT master, and I verified that the complete accesses are functional.
Does anyone know how to perform complete access using TwinCAT?
Twincat does it automatically if the ESI file has the complete access flag.

Flash and debug STM32F7 discovery with openocd

I recently bought an STM32F7 discovery board [1], and I am therefore trying to flash it using openocd, since the board has an embedded st-link debugger. I have my toolchain working (I am using makefiles and arm-none-eabi-gcc), but I would like to flash the board using eclipse so I can have a graphical debugger.
In order to do so, I installed openocd from their git repo and I launch it with the following config file :
source [find board/stm32f7discovery.cfg]
And then I use the following commands in eclipse with arm-none-eabi-gdb to flash the board :
target remote localhost:3333
monitor flash protect 0 0 11 off
monitor flash erase_address 0x08000000 0x100000
monitor flash write_image erase "/absolute/path/hello-world.hex" 0 ihex
monitor reset halt
I tried different list of commands, including th one from the tutorial I used to set up my debug chain on eclipse [2] or from other SO posts [3][4]. Sometimes the write operation fails, and when it doesn't I end up with a wrong PC (e.g. 0xfffffffe instead of 0x080004ac which is the address if the reset handler). Therefore the CPU will try to execute something that doesn't even exist (outside my memory) and it fails.
Do you have any idea of what might be wrong ? A small precision : I am working on Linux.
Cheers,
Antoine.
[1] : www.st.com/web/en/catalog/tools/FM116/SC959/SS1532/LN1848/PF261641?sc=stm32f7-discovery
[2] : vedder.se/2012/12/debugging-the-stm32f4-using-openocd-gdb-and-eclipse/
[3] : stackoverflow.com/questions/5535110/stm32-gdb-openocd-commands-and-initialization-for-flash-and-ram-debugging
[4] : stackoverflow.com/questions/17003519/stm32f4discovery-openocd-telnet-uploading-demo-program
[5] : github.com/texane/stlink
[Edit]
I also tried to use an st-link program from github [5] and to load with gdb, and I get a similar error :
2016-03-23T09:22:22 INFO src/stlink-common.c: Attempting to write 32768 (0x8000) bytes to stm32 address: 134217728 (0x8000000)
2016-03-23T09:22:22 WARN src/stlink-common.c: Failed to unlock flash!
EraseFlash - Sector:0x0 Size:0x8000
Flash page at addr: 0x08000000 erased
2016-03-23T09:22:22 INFO src/stlink-common.c: Finished erasing 1 pages of 32768 (0x8000) bytes
2016-03-23T09:22:22 INFO src/stlink-common.c: Starting Flash write for F2/F4/L4
2016-03-23T09:22:22 INFO src/stlink-common.c: Successfully loaded flash loader in sram
enabling 32-bit flash writes
size: 32768
2016-03-23T09:22:23 INFO src/stlink-common.c: Starting verification of write complete
2016-03-23T09:22:23 ERROR src/stlink-common.c: Verification of flash failed at offset: 0
I managed to solve the problem. It turns out I must have modified the internal option bytes, and this was blocking me when I was trying to flash the board.
I used st-link utility to set them back to their default values, and now everything is working fine ! It is probably possible to use openocd instead, but I haven't tried yet. If someone knows how to do it, it would be nice of him to share it.
For more details on the option bytes, you can have a look at the reference manual [1], page 80 to 83.
[1] : http://www.st.com/st-web-ui/static/active/en/resource/technical/document/reference_manual/DM00124865.pdf

Sonarqube web UI profiles management is slow with Oracle

Installing SonarQube with Oracle on a virtualized environment (production), the profiles management is very slow compared to other installation with same distribution.
I will be grateful of some feedbacks about response time of this functionality when many profiles used on this architecture (Virtualized Linux + Oracle).
Tests below and a quick analysis to give some informations / case reproduction.
Distribution :
SonarQube 3.7.3 with 39 plugins (jar files in extensions/plugins/)
9 languages profiles : C#/C++/Flex/Java/JavaScript/PHP/Python/Web/XML (Problem increases with number of profiles)
clean installation (no projects analysed, profiles by default)
Scenario :
Calling profiles page (as nemo profiles page), second call reported after cache filled, only 1 user on platform
Log 'rails' in INFO in logback.xml
VM virtualized :
Linux SLES 11 (patch 2) x86 64b
DELL R815 / 16 core AMD (guaranteed for SonarQube VM : 1 core & 8 Go)
Tests on VM environment :
8093ms (View: 7219, DB: 864) : server on VM / Oracle on VM
2206ms (View: 1851, DB: 346) : server & H2 Embedded on same VM
=> Response time acceptable with H2 (CPU frequency not very high on VM), so no CPU/IO/RAM saturation. But some suspicions with Oracle about View part.
Personal tests :
2054ms (View: 542, DB: 1506) : server on Laptop Dell Vostro 3300 / MySql on NAS Qnap TS-219
808ms (View: 528, DB: 273) : server & HsqlDB on Laptop Dell Vostro 3300
=> Distant Database has no impact on View part (with MySQL in this case)
For fun & info, SonarQube works (starting and profiles consultation) on Qnap TS-219 (CPU armv5tel !!) with Java Service Wrapper Linux CPU armel v3.5.22
13762ms (View: 10877, DB: 2832) : server & H2 Embedded on NAS Qnap TS-219
13622ms (View: 10581, DB: 2997) : server & MySQL on NAS Qnap TS-219
=> Qnap TS-219 is not enough for SonarQube (CPU saturation ;-)).
With connecting JVisual in JMX remote for taking some thread dump, 75% have this stack (other are equivalent until RuntimeCache.getConstantFrom) :
java.lang.Thread.State: RUNNABLE
at java.lang.Throwable.getStackTraceElement(Native Method)
at java.lang.Throwable.getOurStackTrace(Throwable.java:591)
- locked <5512520e> (a java.lang.Exception)
at java.lang.Throwable.getStackTrace(Throwable.java:582)
at java.lang.Thread.getStackTrace(Thread.java:1479)
[...]
at org.jruby.RubyException.prepareBacktrace(RubyException.java:160)
[...]
at org.jruby.exceptions.RaiseException.<init>(RaiseException.java:141)
[...]
at org.jruby.Ruby.newNameError(Ruby.java:3243)
at org.jruby.RubyModule.const_missing(RubyModule.java:2647)
at org.jruby.RubyModule$i$1$0$const_missing.call(RubyModule$i$1$0$const_missing.gen:65535)
[...]
at rubyjit.ActiveSupport::Dependencies::ClassConstMissing#const_missing_1F94EEFD25B9D6ED4A2256A01713AC5D8AAE19F9.__file__(/[sonar-dir]/sonar-3.7.3/war/sonar-server/WEB-INF/gems/gems/activesupport-2.3.15/lib/active_support/dependencies.rb:118)
at rubyjit.ActiveSupport::Dependencies::ClassConstMissing#const_missing_1F94EEFD25B9D6ED4A2256A01713AC5D8AAE19F9.__file__(/[sonar-dir]/sonar-3.7.3/war/sonar-server/WEB-INF/gems/gems/activesupport-2.3.15/lib/active_support/dependencies.rb)
[...]
at org.jruby.RubyModule.fastGetConstantFromConstMissing(RubyModule.java:2974)
at org.jruby.ast.executable.RuntimeCache.getConstantFrom(RuntimeCache.java:418)
at org.jruby.ast.executable.AbstractScript.getConstantFrom0(AbstractScript.java:292)
at rubyjit.ArJdbc::Oracle#sql_literal?_35B81FE146BCEA62ED756B5BE2D767870ADF57AC.rescue_1$RUBY$SYNTHETIC__file__(/[sonar-dir]/sonar-3.7.3/war/sonar-server/WEB-INF/gems/gems/activerecord-jdbc-adapter-1.1.3/lib/arjdbc/oracle/adapter.rb)
at rubyjit.ArJdbc::Oracle#sql_literal?_35B81FE146BCEA62ED756B5BE2D767870ADF57AC.__file__(/[sonar-dir]/sonar-3.7.3/war/sonar-server/WEB-INF/gems/gems/activerecord-jdbc-adapter-1.1.3/lib/arjdbc/oracle/adapter.rb:162)
at rubyjit.ArJdbc::Oracle#sql_literal?_35B81FE146BCEA62ED756B5BE2D767870ADF57AC.__file__(/[sonar-dir]/sonar-3.7.3/war/sonar-server/WEB-INF/gems/gems/activerecord-jdbc-adapter-1.1.3/lib/arjdbc/oracle/adapter.rb)
[.......]
at org.jruby.evaluator.ASTInterpreter.INTERPRET_METHOD(ASTInterpreter.java:74)
[...]
at org.eclipse.jetty.util.thread.QueuedThreadPool$3.run(QueuedThreadPool.java:543)
at java.lang.Thread.run(Thread.java:662)
Hypothesis :
Many time to generate java exception (CPU cost not negligible) ? (or programming by exception is a desired process)
Especially with Oracle connector ? (Or the Oracle dialect used to generate request could explain these responses time when many profiles)
Perhaps I see problems where there are not ... but this response time with Oracle on this page (and more generally on profiles management) could be a little strange.
Thanks in advance for feedbacks or ideas.
The discussion has switched to the SonarQube user mailing list : http://sonar.markmail.org/thread/gbmj5dwyrrysujfo

Uboot Option to print boot time prefixes

Is there any uboot config option to print boot sequence with time prefixes similar to kernel option CONFIG_PRINTK?
I am expecting output like below,
[ 0.000000] U-Boot 1.1.4-gedeced79 (Feb 6 2012 - 09:27:11)
[ 0.011300] Starting kernel ...
[ 0.015686] Uncompressing Linux... done, booting the kernel
define DEBUG config option is best for your purpose, it is picked up by all u-boot code after you put it in your include/configs/myboard.h. (each config option is '#define', but that is doing strange things in my page preview)
Also
define CONFIG_BOOTSTAGE.
You can look at README for this, code is in common/bootstage.c, its functions do some of what you want. You may have to add a function show_boot_progress() in your BSP, for these functions to be used. With those in place, I believe there are already hooks in infrastructure code for them to get called, but I haven't used this option.
I am not aware of U-Boot config option that does such thing, but there are some other techniques which enables you to do it. I.e. config option inside the Linux kernel.
Take a look at: Measuring Boot-up time

Linux Source code location of interface configuration(eth)

My requirement is to implement(insert ) an ip address validation step in kernel.. Once any of the interface is up and got ip, then my validation should happen..
So as the first step , in source code (linux 2.6 source code I downloaded ) , in which file I need to trace
The kernel is the wrong place for this unless you're doing something embedded with a teeny tiny footprint. What you really want is ifplugd.
However, if you absolutely insist on having it be in the kernel - take a look at the kernel bits that get enabled when CONFIG_IP_PNP=y

Resources