I bought a MAX 10 FPGA 10M08 Dev Board and is has a JTAG on it that says to program with a Altera USB Blaster. Being impatient and all can I use my AVR Programmer and connect, assuming target power is used like so?
AVR => JTAG
===========
SCK -> TCK
MISO -> TDO
REST -> TMS
MOSI -> TDI
I am guessing the clock speeds here sck to tck may be the biggest issue?
JTAG != AVR ISP
Not only is JTAG completely different from Atmel's AVR ISP, even if you had an Atmel JTAG programmer, it's very unlikely it would work with the Altera FPGA. Despite JTAG being a common "standard", JTAG programmers/devices from different vendors do not necessarily work together, often because the vendor specific tools do not like non-vendor programmers.
Related
Is there any way I can apply stimulus signals on my FPGA board from my PC itself, and view the output of hardware in any simulation software? I am working on Spartan 3A development board provided by numato labs (elbert V2)
https://numato.com/product/elbert-v2-spartan-3a-fpga-development-board/
It is a relatively small board with few peripherals, so the number of LEDs for output and push-buttons for input is quite less.
I am a newbie to FPGAs but have sound knowledge on verilog. Please help me out with this
Thanks
The board does not have an physical interface intended for use as wired connection/communications (no ethernet, no usb, no uart, etc) to a PC.
These are the easiest ways I can think of for an 'elbert V2' board to communicate with a PC:
The board has a micro SD connector to access files on the micro SD interface. Those files could be accessed by a Verilog simulation.
A USB to UART adapter could be used with the boards GPIO interface.
Here is an example:
https://www.amazon.com/3-3V-UART-Serial-Cable-TTL-232R-3V3/dp/B078GMQPLT
The cable provides 3.3V TTL and the board has 3.3V gpio ports so that is encouraging. Probably just need to connect 3 wires tx/rx/ground.
You would need to design or find UART RTL IP for the FPGA.
Designing the UART would be a good intermediate level Verilog project.
Use procom or similar software on the PC to communicate with the USB/UART com port on the PC and a file. Verilog simulations can access the data in the file.
I have an avr, but I do not have any sidewall to program it. Is it possible to program an avr with an usb cable without any modules (with four wire available on usb cable)
No it is not possible. You need to program DFU bootlader first.
Many ARM uCs have DFU bootloaders in their ROMs, and IMO it is not worth nowadays to start learning obsolete 8bit architecture
I'm Looking for a USB Host Control to connect a USB Keyboard and PS gaming controller to control program functionallity (a game) done on FPGA.
I have built a simple game in VHDL on the DE10 platform, currently controllerd using a keboard connected to the PS/2 interface (and a VHDL controller I have found on-line). Looking to expand the gaming control by connecting a USB keyboard and PS gaming controller, but I can't figure out how to build to the USB host controller in VHDL/find an existing one.
Would appriciate to know if there are exiting USB host controllers in VHDL/BSF/BDF formarts I can use to connect USB devices and get decoded information, or am I in over my head.
Thanks!
You are not only far, far in over your head, but any USB interface will need an analogue section which your FPGA does not** have.
I know from experience that USB PHY-only chips are (almost?) impossible to get.
Also where would you run the USB protocol on? And are you planning to write a USB software stack? Unfortunately these things are not that simple.
I would guess the best option would be to make a VHDL UART interface connected to a USB <=> RS323 converter cable and plug that in a PC/Raspberry-Pi or something else with a keyboard.
**There are FPGAs with a USB PHY but they have the USB digital section too, as well as an on-chip processor.
I am new to FPGA and I am trying to get a working JTAG setup on Lattice iCE40 FPGA.
The board I'm using is from Olimex and has iCE40-HX8K FPGA.
I'm using urjtag as PC application and tried with DirtJTAG and USB Blaster clones as programmer (flashed onto STM32 BluePill board).
Olimex board didn't have populated pull-up resistors for JTAG so I soldered them (10k for TMS, TDI and TCK).
But the end result is the same: I cannot get jtag to recognize FPGA, the error is:
jtag> cable UsbBlaster
Connected to libftdi driver.
jtag> detect
warning: TDO seems to be stuck at 1
Checked pinout of the JTAG connector and it's correct. Multimeter tests show that there is no short-circuit, no solder bridges, pullups are correct value and working and as expceted.
Tried my setup with Altera FPGA board and it's working, it will detect the FPGA.
Also, tried eBay UsbBlaster clone and it's not working on iCE40, but works for Altera FPGA.
I can flash the external flash (with other tools and programmer), but I want to be able to use JTAG so I can flash onboard SRAM instead.
Any ideas/hints what might be wrong/what to try next?
iCE40 FPGAs do not have a JTAG interface.
I am using ATMEGA128 to communicate with another device. For this I am using SPI with ATMEGA128 as slave. I use SS, SCK and MOSI pins. The problem I am facing is that when I have to download program, I have to disconnect SPI pins. The ATMEGA128 module I am using uses TXD0, RXD0, SCK(PB1) pins to download program. Why am I facing this problem ? Is it because SPI and downloading circuit uses same SCK pins ? Is there any way to avoid disconnecting SPI pins ?
Does the other device have a chip select input, or could you add one on its VCC pins? If so, you could tie this device's CS (active low) input to an extra AVR port pin with an external pull-up resistor attached (maybe 10k ohms or so), then set this AVR pin low at the start of your code somewhere. The device will be disabled by the external pull-up until programming of the AVR is finished and your code re-enables it when run.
Is it because SPI and downloading circuit uses same SCK pins ?
Yes, you have to prevent any other device from driving the SPI lines during programming.
Is there any way to avoid disconnecting SPI pins ?
Yes. To avoid driver contention, a series resistor should be placed on each of the three dedicated lines if there is a possibility that external circuitry could be driving these lines.
See my answer here.