Make file macro - makefile

Question

# this is a comment
OBJS = student.o teacher.o class.o
CC = g++
DEBUG = -g
CFLAGS = -Wall –c $(DEBUG)
LFLAGS = -Wall $(DEBUG)
myproj.exe : $(OBJS)
$(CC) $(LFLAGS) $(OBJS) –o myproj.exe
student.o : student.h student.cpp
$(CC) $(CFLAGS) student.cpp
teacher.o : teacher.h teacher.cpp
$(CC) $(CFLAGS) teacher.cpp
class.o : class.h student.h teacher.h class.cpp
$(CC) $(CFLAGS) class.cpp
can someonte tell me why does CFLAGS and LFALGS have the $(DEBUG) behind?

Answer 1

So you don't have to write it every time you compile or link.
Lets take these two lines from your file:
student.o : student.h student.cpp
$(CC) $(CFLAGS) student.cpp
If you didn't have $(DEBUG) in $(CFLAGS) you would have to write
student.o : student.h student.cpp
$(CC) $(CFLAGS) $(DEBUG) student.cpp
And do it for every rule and command where you want to use $(DEBUG).