Human matrix convert into zombie [closed] - algorithm

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I face this questing in an interview. Please let me know possible answer for this questing.
We have a matrix like 3 X 3, 5 X 5 or 7 X 7. In mid we do have X(represent zombie) and 0(void or blank) or 1(Human) at all nodes. X created all adjacent human nodes zombie in a minute.
So how much time it will take to create all matrix zombie.

Don't let the terminology fool you: this is a graph problem. I assume that a zombie can also reach the humans that are diagonally adjacent to it.
If you conduct a Breadth first search from the "Zombie point", you will be able to determine that time (if it exists). This is basically how you proceed: (code sample in Python)
matrix = [['1', '0', '0'],['1', 'X', '1'],['0', '0', '0']]
mid = len(matrix)//2
yet_to_explore = [(mid,mid,0)]
explored_set = {} # This is a hashset of explored nodes
while [] != yet_to_explore:
cur_vertex = yet_to_explore.pop(0)
x = cur_vertex[0]
y = cur_vertex[1]
if (x,y) in explored_set:
continue
explored_set[(x,y)] = cur_vertex[2]
matrix[x][y] = 'X'
for i in range(-1,2):
if 0 > x + i or len(matrix) <= x + i:
continue
for j in range(-1,2):
if 0 > y + j or len(matrix) <= y + j:
continue
elif 0 == i and 0 == j:
continue
elif matrix[x+i][y+j]=='1':
yet_to_explore.append((x+i, y+j, cur_vertex[2]+1))
# If your matrix contains a '1' after the BFS this means some human were not reachable (they are isolated) -> the desired time does not exist since not every human can be a zombie
# Else the time you are looking for is the following result:
time = max(list(explored_set.values()))
An example where there is a survivor:
matrix = [['0', '0', '0', '0', '0', '0', '0'],
['1', '1', '1', '1', '0', '0', '0'], # The human on the left will be contamined within 4 min
['0', '0', '0', '1', '0', '0', '0'],
['1', '0', '0', 'X', '0', '0', '0'], # The human on the left will survive
['0', '0', '1', '0', '1', '0', '0'],
['0', '0', '1', '0', '0', '1', '0'],
['0', '1', '0', '0', '0', '0', '1']] # The human on the right will be contamined within 3 min
The search for hypothetical survivors is left as an exercise.

Related

PLSQL bitmask values

I am in this situation, I cannot validate the bit for the print permission. Unfortunately I can't have a bitmask with a single bit lit. Can you give me some suggestions?
SELECT
DECODE(BITAND(00000000100000100000000000000001, 1), 1, '1', '0') AS READ,
DECODE(BITAND(00000000100000100000000000000001, 131072), 131072, '1', '0') AS COPY,
DECODE(BITAND(00000000100000100000000000000001, 8388608), 8388608, '1', '0') AS PRINT
FROM
DUAL
The result is the following
R C P
- - -
1 1 0
Can you give me some suggestions?
The BIT_AND function has both arguments as numbers, and there is no bit vector.
For example:
select bin_to_num(0,0,0,0,0,0,0,0,1,0,0,0,0,0,1,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1) from dual;
OUTPUT>
8519681
with
datum as
(select bin_to_num(0,0,0,0,0,0,0,0,1/*print*/,0,0,0,0,0,1/*copy*/,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1/*read*/) val from dual)
select
decode(bitand(val, 1), 1, '1', '0') as read,
decode(bitand(val, 131072), 131072, '1', '0') as copy,
decode(bitand(val, 8388608), 8388608, '1', '0') as print
from datum

Split int to separate digits so as to loop over each digit

Am new to GoLang. So am doing leetcode problems each day of which one was to Subtract the Product and Sum of Digits of an Integer. For this initially I thought of splitting the integer to individual numbers and then add / multiply all of them to get the output. But was unable to do that as I currently do not understand the type conversions adequately. After many trials and errors, I gave up on that approach and used the divide & modulo to get the last numbers and getting the output. Here's what I did:
func subtractProductAndSum(n int) int {
sum, prod := 0, 1
for {
if n < 10 {
sum += n
prod *= n
break
}
sum += n % 10
prod *= n % 10
n = n / 10
}
return prod - sum
}
This worked but among other answers I found one which worked, based on my first approach (Splitting and conquering), which was:
func subtractProductAndSum(n int) int {
p := 1
s := 0
strN := strconv.Itoa(n)
for _, val := range strN {
intVal := int(val - '0')
p = p * intVal
s = s + intVal
}
return p - s
}
In this approach I could not understand intVal := int(val - '0'). It certainly gets the desired output. I think val is being type casted to int but I am unable to understand what is - '0' helping with.
Hoping somebody could help.
Your strN contains a string value which is same as n. val variable in for loop is a character type data not a int digit and it's definitely not being type casted into int.
The variable val may contain any of the following character {'0', '1', '2', '3', '4', '5', '6', '7', '8', '9'}.
So, if you subtract '0' from any of the digit character, you will get difference between '0' and that digit which is actually the int value you are looking for.
The subtract is basically the difference between the ASCII values of the two characters.
For example, if you subtract '0' from '5', you will get 5 which is integer value.
ASCII value of '5' and '0' is 53 and 48. So, '5' - '0' is actually 53 - 48 whch is 5.
This is how the type conversion in your code works.

Scilab symbolic matrix multiplication

I have 3 matrix:
T_01 = ['cosd*t1', '-sind*t1', '0', 'd1*cosd*t1'; 'sind*t1', 'cosd*t1', '0', 'd1*sind*t1'; '0', '1', '1', '0'; '0', '0', '0', '1']
T_12 = ['cosd*t2', '-sind*t2', '0', 'd2*cosd*t2'; 'sind*t2', 'cosd*t2', '0', 'd2*sind*t2'; '0', '1', '1', '0'; '0', '0', '0', '1']
T_23 = ['cosd*t3', '-sind*t3', '0', 'd3*cosd*t3'; 'sind*t3', 'cosd*t3', '0', 'd3*sind*t3'; '0', '1', '1', '0'; '0', '0', '0', '1']
I need to make a symbolic multiplication, so I'm trying:
mulf(T_01,T_12,T_23)
But I get this error:
!--error 39
mulf: Quantidade incorreta de argumentos de entrada: esperava-se 2.
What is happening?
Obs.: Sorry for my english.
If what you want is to get the symbolic multiplication of two matrix, you'll have to implement such function. Here I've implemented three functions that together can perform what you want:
function s = scaProd(a,b)
//escalar product of two vectors
//using recursion
if (a == [] | b == []) then
s = ""
elseif (max(size(a)) ~= max(size(b))) | ...
(min(size(a)) ~= min(size(b))) | ...
(min(size(a)) ~= 1) then
error("vectorMulf: Wrong dimensions")
else
s = addf( mulf(a(1), b(1)) , scaProd(a(2:$), b(2:$)) )
end
endfunction
function s = matrixMulf(a,b)
//matrix multiplication
acols = size(a,'c');
brows = size(b,'r');
if acols ~= brows then
error("matrixMulf: Wrong dimensions")
end
arows = size(a,'r');
bcols = size(b,'c');
s = string(zeros(arows,bcols));
for i = 1 : arows
for j = 1 : bcols
s(i,j) = scaProd(a(i,:),b(:,j)');
end
end
endfunction
function s = addP(a)
//encolses each element of a in a pair of parenthesis
s = string(zeros(a));
for i = 1 : size(a,'r')
for j = 1 : size(a,'c')
s(i,j) = "(" + a(i,j) + ")"
end
end
endfunction
Here is an example of it's output. Test code:
A = [1 2; 3 4];
B = [5 6; 7 8];
C = [9 0; 1 2];
disp(A*B*C)
As = string(A);
Bs = string(B);
Cs = string(C);
disp(matrixMulf(As,addP(matrixMulf(Bs, Cs))))
Console output:
193. 44.
437. 100.
!1*(5*9+6*1)+2*(7*9+8*1) 1*(5*0+6*2)+2*(7*0+8*2) !
! !
!3*(5*9+6*1)+4*(7*9+8*1) 3*(5*0+6*2)+4*(7*0+8*2) !
For the result you want, you should do:
Enclose every term of each of your matrices with parenthesis using addP()
Perform the symbolic multiplication like matrixMulf(t1,addP(matrixMulf(t2,t3))), where t1, t2, t3 are the enclosed versions of your matrices.
And two final notes:
It is important to use addP at each multiplication step to get the correct result. You can check that by removing the ( and ) in the example I gave: the result won't be correct.
The functions mulf and addf are not available on Scilab 6.0.0. So remember you won't be able to use them if you upgrade your Scilab to the current stable version.

Directly Instansiating a DSP Slice Without IP Core

The Problem
I want:
p <= (d-a) * b
Trying to directly instantiate a DSP block by using a DSP48E1 instead of simply writing p <= (d-a) * b plus it helps me understand how this block works for the future. So far I've had little luck with it though.
Referencing this article:
http://www.xilinx.com/support/documentation/user_guides/ug479_7Series_DSP48E1.pdf
Attempt
These are my current settings:
a <= std_logic_vector(to_unsigned(5, 30));
b <= std_logic_vector(to_unsigned(1, 18));
d <= std_logic_vector(to_unsigned(20, 25));
dsp : DSP48E1
generic map (
USE_DPORT => True,
ALUMODEREG => 0,
CARRYINREG => 0,
CARRYINSELREG => 0,
CREG => 0
)
port map(
clk => clk,
acin => std_logic_vector(to_unsigned(1, 30)), -- cascaded data input
alumode => "0000", -- control bits to select logic unit inputs
bcin => std_logic_vector(to_unsigned(1, 18)), -- cascaded data input
carrycascin => '0', -- cascaded data input
carryin => '0', -- carry input
carryinsel => "000", -- selects carry source
cea1 => '1', -- clock enable if AREG = 2 or INMODE0 = 1
cea2 => '1', -- clock enable if AREG = 1 or 2
cead => '1', -- clock enable for AD pipeline register
cealumode => '0', -- clock enable for ALUMODE --0
ceb1 => '1', -- clock enable if BREG = 1 or INMODE4 = 1
ceb2 => '1', -- clock enable if BREG = 1 or 2
cec => '0', -- clock enable for C
cecarryin => '0', -- clock enable
cectrl => '0', -- clock enable for OPMODE and CARRYINSEL ctrl registers
ced => '1', -- clock enable for D
ceinmode => '0',-- **** clock enable input registers
cem => '0', -- clock enable for the post multiply M register and the internal multiply round CARRYIN register
cep => '1', -- clock enable
inmode => "01101", -- *selects functionality of preadder [3] = sign, [4] = B multiplier sel
multsignin => '0', -- MACC extension sign
opmode => "0000101", -- *** Control input to A, Y and Z multiplexers
pcin => std_logic_vector(to_unsigned(1, 48)), -- cascade input
rsta => rst,
rstallcarryin => '0',
rstalumode => '0',
rstb => rst,
rstc => '0',
rstctrl => rst,
rstd => rst,
rstinmode => rst,
rstm => rst,
rstp => rst,
a => a,--_dsp, -- bits 29:25 used in second stage preadder
b => b,--_dsp,
c => c_dsp,
d => d,--_dsp,
p => p_dsp
);
I always get p = 0 even if I force d = 20, a = 5, b = 1.
I figured I should keep ALUMODE and OPMODE at 0 since I'm skipping the final stage and just want a straight subtraction and multiplication.
Photos
Look at table 2-7 from the DSP48E1 user guide page 34.
Your current configuration performs, at the post-adder, P = Z + X + Y + CIN, with Z = 0, X = 0 and Y = 0. You see the problem here?
The OPMODE signals control the value of the multiplexers. You want OPMODE(6 downto 4) = "000", so that Z keeps its null value. However, you want OPMODE(3 downto 0) = "0101" to set X/Y to the multiplier output M. ALUMODE should keep it's current value, it's fine.

Assign signal in two processes in VHDL

I'm new to VHDL. I understand that processes are executed concurrently. But I don't grasp the output of the following program:
-- library declaration
library IEEE;
use IEEE.std_logic_1164.all;
use ieee.numeric_std.all;
entity Ex2 is
end Ex2;
architecture behav of Ex2 is
signal A : std_logic;
begin
proc1 : process is
begin
wait for 20 ns;
A <= '1';
wait for 20 ns;
A <= 'Z';
wait for 20 ns;
A <= '0';
end process proc1;
proc2 : process is
begin
wait for 10 ns;
A <= '0';
end process proc2;
end behav;
"A" has the follwing values over time:
0 ns - 20 ns -> U
20 ns - 30 ns -> X
30 ns - 40 ns -> 1
40 ns - 80 ns -> 0
80 ns - 90 ns -> X
My imagination how the output should look like:
In proc2 "A" get 0 after 10ns. The process ends so "A" should be 0 after 10ns.
After 20ns both processes are resuming, both are writing "A" at the same time so X is okay.
After 30ns proc2 again writes 0 so "A" should become 0 but it is 1.
and so on
Each process has a driver for A, and the result of driving from the two
processes is generated by the resolution function for std_logic.
If you make separate versions of A from the two processes, called A_1 and
A_2, and then drive the common A outside the processes with the code:
A <= A_1;
A <= A_2;
Then you can see the value driven from each of the processes in the figure
below.
The resolution function then resolved the two sources A_1 and A_2 that
drives A based on the table below:
U X 0 1 Z W L H -
-----------------
U | U U U U U U U U U
X | U X X X X X X X X
0 | U X 0 X 0 0 0 0 X
1 | U X X 1 1 1 1 1 X
Z | U X 0 1 Z W L H X
W | U X 0 1 W W W W X
L | U X 0 1 L W L W X
H | U X 0 1 H W W H X
- | U X X X X X X X X
The initial values driven from start of simulation and until first explicit
assign in the process is 'U' (Uninitialized).
So for example, the reason that A is not '0' after 10 ns, is that the value
driven to A from proc1 is 'U', and the resolution table above shows that
('U', '0') results in 'U'.
Each process has it's own driver for A. The effective value of A is the resolved value of both drivers. The processes are concurrent to each other, it's like taking two different ICs and connecting a pin on both to the same net (named A in this case).
The resolution function for std_logic is found in package std_logic_1164 in library ieee.
Values to be resolved are taken two at a time and input to a resolution table:
-------------------------------------------------------------------
-- resolution function
-------------------------------------------------------------------
CONSTANT resolution_table : stdlogic_table := (
-- ---------------------------------------------------------
-- | U X 0 1 Z W L H - | |
-- ---------------------------------------------------------
( 'U', 'U', 'U', 'U', 'U', 'U', 'U', 'U', 'U' ), -- | U |
( 'U', 'X', 'X', 'X', 'X', 'X', 'X', 'X', 'X' ), -- | X |
( 'U', 'X', '0', 'X', '0', '0', '0', '0', 'X' ), -- | 0 |
( 'U', 'X', 'X', '1', '1', '1', '1', '1', 'X' ), -- | 1 |
( 'U', 'X', '0', '1', 'Z', 'W', 'L', 'H', 'X' ), -- | Z |
( 'U', 'X', '0', '1', 'W', 'W', 'W', 'W', 'X' ), -- | W |
( 'U', 'X', '0', '1', 'L', 'W', 'L', 'W', 'X' ), -- | L |
( 'U', 'X', '0', '1', 'H', 'W', 'W', 'H', 'X' ), -- | H |
( 'U', 'X', 'X', 'X', 'X', 'X', 'X', 'X', 'X' ) -- | - |
);
The intersection of the horizontal and vertical values shown is the resolved values.
If A hadn't been declared with a resolved base type you would have gotten an error message complaining about that instead of resolved values.

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