I have these sources and headers. How do I make a make file for them?
//a.h
#ifndef A_H
#define A_H
#include <stdio.h>
int fun(int i);
#endif
//a.c
#include "a.h"
int fun(int i){
if(i%2==0){
return 1;
}
printf("%d\n",i);
}
//b.h
#ifndef B_H
#define B_H
#include "a.h"
int fun2(int i);
#endif
//b.c
#include "b.h"
#include <stdio.h>
int fun2(int i){
if(i%2==0){
return 1;
}
printf("%d\n",fun(2));
}
//c.c
#include "b.h"
#include <stdio.h>
int main(){
int a=1;
a=fun(1);
printf("%d %d\n",a,fun(1));
int b=1;
b=fun2(2);
printf("%d %d\n",b,fun2(1));
}
This is the makefile I have created:
//makefile
CC=gcc
all:main
main: c.c b.o
$(CC) c.c b.o -o $#
b.o: b.c a.o
cc -c b.c a.o
a.o: a.c
cc -c a.c
.PHONY:clean
clean:
rm -rf *.o
rm -rf main
b.c use function fun() defined in a.h (and therefore, fun() is declared in a.c).
c.c uses functions fun() from a.h and fun2() in b.h.
a.h is already included in b.h and I am including b.h in c.c.
Therefore, I have not included a.h again in c.c.
I am trying to make .o files of all of these a.c b.c and c.c, and then link them into a executable named main.
First, trying to combine two source files (like a.c and b.c) into a single object file is unusual, awkward and pointless. Just build an object for every source; if you like, you can combine them into a library later.
b.o: b.c
cc -c b.c
Second, you're using object files (which is a good idea), so use object files. Don't make c an exception.
main: a.o b.o c.o
$(CC) a.o b.o c.o -o $#
Third, Make already has an implicit rule for building object files from C source files, so you don't have to write those rules,
Fourth and last, there are more automatic variables than just $#, and they're good tools to know:
main: a.o b.o c.o
$(CC) $^ -o $#
These are the files after edit, now the makefile works fine:
//a.h
#ifndef A_H
#define A_H
#include <stdio.h>
int fun(int i);
#endif
//a.c
#include "a.h"
int fun(int i){
if(i%2==0){
return 1;
}
printf("%d\n",i);
}
//b.h
#ifndef B_H
#define B_H
#include "a.h" //included a.h as fun2() uses fun() in a.h
int fun2(int i);
#endif
//b.c
#include "b.h"
#include <stdio.h>
int fun2(int i){
if(i%2==0){
return 1;
}
printf("%d\n",fun(2));
}
//c.c
#include "b.h" //b.h becauses fun2() in this, and a.h is in this header, explanation in b.h
#include "a.h" //I have now included a.h also as this uses fun(), multiple inclusions don't matter as these headers have include guards
#include <stdio.h>
int main(){
int a=1;
a=fun(1);
printf("%d %d\n",a,fun(1));
int b=1;
b=fun2(2);
printf("%d %d\n",b,fun2(1));
}
I don't need .c files or definitions of external functions I use in something.c, I just need their headers (or declarations) to create .o (object files).
Therefore, to create, b.o from b.c, I have included a.h and b.h for function definitions and gcc -c b.c creates b.o
Similarly, c.o is made using gcc -c c.c , I have included a.h and b.h in c.c as I use their functions.
lastly, just link them together, gcc -o main a.o b.o c.o
This is the new make file, I ws making it wrong, was including .c of the external function while making their .o, this time I just include headers and do gcc -c a.c, b.c or c.c (separately for these 3), after this I link a.o b.o c.o to make a dynamically linked exec named main:
CC=gcc
all:main
main: a.o b.o c.o
$(CC) $^ -o $#
c.o: c.c a.h b.h
cc -c $<
b.o: b.c b.h a.h
cc -c $<
a.o: a.c a.h
cc -c $<
.PHONY:clean
clean:
rm -rf *.o
rm -rf main
This is the output of make:
─# make
cc -c a.c
cc -c b.c
cc -c c.c
gcc a.o b.o c.o -o main
I did nm on these .o files, and figured out the undefined functions marked by U.
─#nm a.o
0000000000000000 T fun
U printf
─#nm b.o
U fun
0000000000000000 T fun2
U printf
─#nm c.o
U fun
U fun2
0000000000000000 T main
U printf
The symbols marked with U are undefined.In b.o fun() is marked U as it is in a.o.
I tried combining them with ld:
─#ld -relocatable a.o b.o -o ab.o
─# ls ab.o
ab.o
─# file !:1
file ab.o
ab.o: ELF 64-bit LSB relocatable, ARM aarch64, version 1 (SYSV), not stripped
─# nm ab.o
0000000000000000 T fun
000000000000003c T fun2
U printf
//This ab.o has fun defined, and is therefore marked with T
─# ld -relocatable ab.o c.o -o abc.o
─# nm abc.o
0000000000000000 T fun
000000000000003c T fun2
0000000000000080 T main
U printf
//fun, fun2 are marked with T in abc.o, they were U in c.o
─# gcc abc.o -o abc
─# ./abc
1
1
2 2
1
1 2
Makefile isn't using implicit rules correctly. I am following this guide here.
Here's my makefile:
objects = main.o hello.o
hello : $(objects)
cc -o hello $(objects)
hello.o : defs.h
main.o : defs.h hello.h
.PHONY : clean
clean :
-rm hello $(objects)
I get the following error:
cc: error: main.o: No such file or directory
It creates the object code hello.o, but does not do it for main.c. If I swap lines and main is above, it'll create main.o but not hello.o.
Here's my main.c file:
#include "defs.h"
#include "hello.h"
int main(int argc, char** argv) {
display_hello();
return (EXIT_SUCCESS);
}
Here's my hello.c file:
#include "defs.h"
void display_hello()
{
printf("Hello!\n");
}
My hello.h file:
#ifndef HELLO_H
#define HELLO_H
#ifdef __cplusplus
extern "C" {
#endif
#ifdef __cplusplus
}
#endif
#endif /* HELLO_H */
void display_hello();
Here's my defs.h file:
#ifndef DEFS_H
#define DEFS_H
#ifdef __cplusplus
extern "C" {
#endif
#ifdef __cplusplus
}
#endif
#endif /* DEFS_H */
#include <stdio.h>
#include <stdlib.h>
Works fine for me, I created the files as https://gist.github.com/boyvinall/f23420215707fa3e73e21c3f9a5ff22b
$ make
cc -c -o main.o main.c
cc -c -o hello.o hello.c
cc -o hello main.o hello.o
Might be the version of make like #Beta said, but even an old version of GNU make should work just fine for this.
Otherwise, ensure you're using tabs to indent in the makefile, not spaces.
When compiling ltrace with icecc we run into a compilation problem. This is the minimal example:
main.c
#include <assert.h>
int main(int argc, char **argv) {
assert(argc != argc);
return 0;
}
test.sh:
#!/bin/bash
set -x
# one step compilation (no warning)
gcc -Wall main.c
# splitted compilation (warning)
gcc -Wall -E main.c -o main.i
gcc -Wall --preprocessed main.i
output:
++ gcc -Wall main.c
++ gcc -Wall -E main.c -o main.i
++ gcc -Wall --preprocessed main.i
main.c: In function ‘main’:
main.c:4:10: warning: self-comparison always evaluates to false [-Wtautological-compare]
assert(argc != argc);
^~
As you can see the result is different when compiling in one step and when preprocessing and compiling in two steps. Is this intended behavior?
I use gcc 6.3, the issue also appears in gcc 6.2 for ARM. I also cannot ignore this, as the full example uses -Werror.
I am currently trying to run my Hello World Kernel Module but I am struggling a bit and I do not know why.
First of all
uname -r
2.6.32-358.23.2.el6.x86_64
My Hello.c
#include <linux/module.h> /* Needed by all modules */
#include <linux/kernel.h> /* Needed for KERN_INFO */
#include <linux/init.h> /* Needed for the macros */
static int __init hello_start(void)
{
printk(KERN_INFO "Loading hello module...\n");
printk(KERN_INFO "Hello world\n");
return 0;
}
static void __exit hello_end(void)
{
printk(KERN_INFO "Goodbye Mr.\n");
}
module_init(hello_start);
module_exit(hello_end);
MODULE_LICENSE("GPL");
My Makefile
obj-m += hello.o
all:
make -C /lib/modules/`uname -r`/build M=`pwd` modules
clean:
make -C /lib/modules/`uname -r`/build M=`pwd` clean
Error message when running
$ sudo insmod ./hello.ko
insmod: error inserting './hello.ko': -1 Invalid module format
dmesg output
hello: no symbol version for module_layout
files in folder
hello.c hello.ko hello.ko.unsigned hello.mod.c hello.mod.o hello.o include Makefile modules.order Module.symvers
What is needed to insert this module and complete my further work?
Im using gcc on Linux and creating a shared library for static libraries. I dont want symbols from some static libraries to be exported.
gcc version is 4.8.0.
Im trying this option at gcc command and it's not working:
-Wl,--exclude-libs,libabc.a .
If I use this option, it's removing all the symbols which not what I want.:
-Wl,--exclude-libs,ALL
Can somebody help in how to use --exclude-option and not to export symbols from specific static library, please?
Thanks
Chandra
Please ignore my comment to question, it is incorrect.
Minimal example:
test1.c:
int testvar1;
int test1(void) {
return 1;
}
test2.c:
extern int testvar1;
int test1(void);
int test2(void) {
testvar1 = -1;
return test1() + 2;
}
test.c:
#include <stdio.h>
#include <dlfcn.h>
int main(int argc, char **argv) {
void *lib = dlopen("./libtest2.so", RTLD_NOW);
int (*f)(void) = dlsym(lib, "test2");
printf("%d\n", f());
return 0;
}
Build:
$ gcc -fPIC -c test1.c
$ ar cru libtest1.a test1.o
$ gcc -fPIC -c test2.c
$ gcc -shared -o libtest2.so test2.o -L. -ltest1 -Wl,--exclude-libs,libtest1.a
$ gcc test.c -ldl
$ ./a.out
3
$ readelf --syms -D libtest2.so | grep test1
$