I want to make simulation of a WRSN (wireless Rechargeable Sensor Network) and I have some problem to implement rechargeable battery module.
I want to know if I can do it with OMNET++ (Castalia)
If yes, how can I do?
if no, what software can I use to make my work?
Related
I have an altera DE2 cyclone-ii fpga board and I want to implement a project on software defined radio(SDR) using GNU Radio on it.Is it possible to load USRP Hardware Driver(FPGA build) provided by Ettus Research.If possible how can I do it.If not is there any other way to implement SDR on FPGA :)
You probably will need some daughter boards to do the front-end processing, which handles the high-frequency signals.
You can use an RTL as a daughter board and with some changes at the USRP code (mostly on the signal reception) you will be able to build your own SDR.
I bought a cheap board with Altera Cyclone II from ebay and want to start experimenting.
I created a simple program, after some research I managed to compile it and after flashing to the board the programming tool said it is 100% complete.
However the behaviour of the board has not changed since the time I first plugged the power supply in(three onboard LEDs are blinking).
It looks like the program has not been loaded to the board.
I don't know what I did wrong.
Any ideas? I am completely new to FPGAs. Thank you
Normally the configuration stream is written into fpga sram, and it won't live across the power cycle. If you want that configuration be "permanent", write it into on-board configuration flash chip.
Did you check with this short introduction: http://laurie.tech/start-fpga/ ?
I am a beginner in Arduino.
I want to connect 2 motors to Arduino. Why do we require txhe motor shield?
And if yes please explain why is it required? Also can I use an amplifier for the same.
Another question, I have SLAEX039 L293D Motor Shield. Does using this motor shield restrict arduino's pin usage? I mean we can't use the arduino pins if we use the motor shield right, can we?
Thank a lot
The core reason that we require motor shields is because the Arduino, on its own, cannot power a motor with its IO pins.
The digital IO pins on the AVR based Arduinos (such as the Uno) are only rated to supply up to 40mA of current at 5V - they are designed for signalling hardware, not driving loads such as motors, that can run to several Amps at higher voltages at peak loads.
Fortunately, there are devices that are designed to control heavy loads such as motors based on these logic level signals - we typically call these drivers. The L293D is such a driver, which connects to a logic device like the Arduino for signalling and then drives a motor from another supply.
While you can use a cheap, standalone L293D device on its own, it's often more convenient to use one carried on a shield, which correctly connects the driver as well as provides connectors for the external power and motor.
Ultimately, you don't require a shield, but you do need some form of driver to take the logic level signals from the Arduino, and shields are convenient ways of providing these.
http://www.ti.com/lit/ds/symlink/l293.pdf is a datasheet for a L293D device from TI, showing the various ways it can drive a motor based on the signals it receives.
I'm new to fpga programming, and I'm wondering how to make my fpga design distributable. Here's the scenario I have in mind. I have a network of computers, each deployed with an fpga based peripheral. I want to update the fpga design on the peripherals periodically. How do I accomplish this without spending a fortune on software licenses?
I have a small dev kit for an fpga that shipped with an executable to load example design files (it was an Altera fpga FYI). Does anyone know how I would create such an executable?
Some specifics:
My fpgas are Xilinx Spartan 6Es. I'm using Xilinx ISE for fpga development. The host computers are running debian linux.
Thanks for any and all advice!
If youre dealing with Altera: one computer would have the software tools and licenses needed to synthesize the project. Assuming all the FPGAs are the same model on each station/node, Quartus will generate an .sof file which you can copy and open from station to station. All you would need to do is download the Altera programmer tool (I believe you can download it separately from Quartus II) on each station which is free. Then upload the .sof to the board using the programmer, where you can permanently store it on the fpga prom using a technique similar to the following:
https://m.youtube.com/watch?v=ZrMe8JS7Ktk
However if you have Xilinx and Altera mix, Xilinx has .bit/xdl files, and uses another tool (impact) to upload their bitstreams. They can't be converted to and from bit and sof. So it's recommended that you probably stick to one make (Xilinx or Altera) and model based on your plans.
It looks like what you are looking for is how to make your FPGA's field upgradable. Assuming your FPGA is loading from an external memory such as an SPI flash chip, then you need to modify your design so that it is capable of writing to the SPI chip (or whatever) itself. This is most simply done by putting a register in your design which maps to the individual pins on the flash chip, and then "bit bang" the register from a connected computer. Assuming your FPGAs feed data into your own software running on the computer, then you would modify this software to have the functionality of manipulating this register to reflash the flash device. Obviously, if this goes wrong you bricked your device until it can be flashed again with the JTAG, but it provides a way for all the devices to get updated in the systems they operate without needing to buy a JTAG cable for every single station.
If you have Ethernet on your board you can use the remote programming tool from fpga-cores.
Then you can remote login to the network and program the FPGAs or mail the new config file to you customer and they run the programmer. This is how we remotely updates our boards.
Spartan 6 is supported. As a bonus you can also do some remote debugging with the remote logic analyzer.
Everything is free for non commercial use.
how can I implement an AdHoc network in fpga using the vhdl programming language. I am using a Scientech st101 with wireless communication kit.
Do you mean an 802.11 Ad Hoc network? If so, that's a large system you'll need to build, including some software, some logic and some analogue hardware. What makes you think VHDL is the right tool for the whole job?