I'm trying to read integers from an input.txt file, below is my read loop where I'm attempting to read and store the integers into an array. I keep getting "Access to unaligned memory location, bad address=ffffff" on any line after the line with "LDR R2, [R2,R5,LSL #2]...im using ARM SIM. Does anyone know what I'm doing wrong?
start:
MOV R5, #0 #int i
MOV R1, #0
swi SWI_Open
LDR R1,=InFileH
STR R0,[R1]
MOV R3, #0
readloop:
LDR R0, =InFileH
LDR R0, [R0]
swi SWI_RdInt
CMP R0, #0
BEQ readdone
#the int is now in R0
MOV R1, R0
LDR R3,=a
STR R2,[R3,R5,LSR#2]
MOV R2, R1
ADD R5, R5, #1 #i++
bal readloop
readdone:
MOV R0, #0
swi SWI_Close
swi SWI_Exit
.data
.align 4
InFileH: .skip 4
InFile: .asciz "numbers.txt"
OutFile: .asciz "numsort.txt"
OutFileH: .skip 4
NewLine: .asciz "\n"
a: .skip 400
i had faced similar issue while programming arm assembly
this was because it was expecting offset in multiples of 4
STR R2, [R1, #2]
the above instruction throws the similar error. so it was resolved by using
STR R2, [R1, #4]
for better understanding clickhere
Related
So I'm having trouble with my program. It's supposed to read in a text file
that has a number on each line. It then stores that in an array, sorts it using selection sort, and then outputs it to a new file. The reading of and writing to the file work perfectly fine but my code for the sort isn't working properly. When I run the program, it only seems to store some of the numbers
in the array and then a bunch of zeroes.
So if my input is 112323, 32, 12, 19, 2, 1, 23. The output is 0,0,0,0, 2,1,23. I'm pretty sure the problem's with how I'm storing and loading from the array
onto the registers because assuming that part works, I can't find any reason why the selection sort algorithm shouldn't work.
Ok thanks to your help, I figured out that I needed to change the load and store instruction so that it matches the specifier used (ldr -> ldrb and str -> strb). But I need to make a sorting algorithm that works for 32 bit numbers so which combination of specifiers and load/store instructions would allow me to do that? Or would I have to load/store 8 bits a time? And if so, how would I do that?
.data
.balign 4
readfile: .asciz "myfile.txt"
.balign 4
readmode: .asciz "r"
.balign 4
writefile: .asciz "output.txt"
.balign 4
writemode: .asciz "w"
.balign 4
return: .word 0
.balign 4
scanformat: .asciz "%d"
.balign 4
printformat: .asciz "%d\n"
.balign 4
a: .space 32
.text
.global main
.global fopen
.global fprintf
.global fclose
.global fscanf
.global printf
main:
ldr r1, =return
str lr, [r1]
ldr r0, =readfile
ldr r1, =readmode
bl fopen
mov r4, r0
mov r5, #0
ldr r6, =a
loop:
cmp r5, #7
beq sort
mov r0, r4
ldr r1, =scanformat
mov r2, r6
bl fscanf
add r5, r5, #1
add r6, r6, #1
b loop
sort:
mov r5,#0 /*array parser for first loop*/
mov r6, #0 /* #stores index of minimum*/
mov r7, #0 /* #temp*/
mov r8, #0 /*# array parser for second loop*/
mov r9, #7 /*# stores length of array*/
ldr r10, =a /*# the array*/
mov r11, #0 /*#used to obtain offset for min*/
mov r12, #0 /*# used to obtain offset for second parser access*/
loop3:
cmp r5, r9 /*# check if first parser reached end of array*/
beq write /* #if it did array is sorted write it to file*/
mov r6, r5 /*#set the min index to the current position*/
mov r8, r6 /*#set the second parser to where first parser is at*/
b loop4 /*#start looking for min in this subarray*/
loop4:
cmp r8, r9 /* #if reached end of list min is found*/
beq increment /* #get out of this loop and increment 1st parser**/
lsl r7, r6, #3 /*multiplies min index by 8 */
ADD r7, r10, r7 /* adds offset to r10 address storing it in r7 */
ldr r11, [r7] /* loads value of min in r11 */
lsl r7, r8, #3 /* multiplies second parse index by 8 */
ADD r7, r10, r7 /* adds offset to r10 address storing in r7 */
ldr r12, [r7] /* loads value of second parse into r12 */
cmp r11, r12 /* #compare current min to the current position of 2nd parser !!!!!*/
movgt r6, r8 /*# set new min to current position of second parser */
add r8, r8, #1 /*increment second parser*/
b loop4 /*repeat */
increment:
lsl r11, r5, #3 /* multiplies first parse index by 8 */
ADD r11, r10, r11 /* adds offset to r10 address stored in r11*/
ldr r8, [r11] /* loads value in memory address in r11 to r8*/
lsl r12, r6, #3 /*multiplies min index by 8 */
ADD r12, r10, r12 /*ads offset to r10 address stored in r12 */
ldr r7, [r12] /* loads value in memory address in r12 to r7 */
str r8, [r12] /* # stores value of first parser where min was !!!!!*/
str r7, [r11] /*# store value of min where first parser was !!!!!*/
add r5, r5, #1 /*#increment the first parser*/
ldr r0,=printformat
mov r1, r7
bl printf
b loop3 /*#go to loop1*/
write:
mov r0, r4
bl fclose
ldr r0, =writefile
ldr r1, =writemode
bl fopen
mov r4, r0
mov r5, #0
ldr r6, =a
loop2:
cmp r5, #7
beq end
mov r0, r4
ldr r1, =printformat
ldrb r2, [r6]
bl fprintf
add r5, r5, #1
add r6, r6, #1
b loop2
end:
mov r0, r4
bl fclose
ldr r0, =a
ldr r0, [r0]
ldr lr, =return
ldr lr, [lr]
bx lr
I figured out that I needed to change the load and store instruction
so that it matches the specifier used (ldr -> ldrb and str -> strb).
But I need to make a sorting algorithm that works for 32 bit numbers
so which combination of specifiers and load/store instructions would
allow me to do that?
If you want to read 32b (4 bytes) values from memory, you have to have 4 bytes values in memory to begin with. Well that should not be surprising :)
Eg if your input is numbers 1, 2, 3, 4, each number is 32b value than in memory that would be
0x00000000: 01 00 00 00 | 02 00 00 00 <- 32b values of 1 & 2
0x00000008: 03 00 00 00 | 04 00 00 00 <- 32b values of 3 & 4
In such case ldr would read 32b each time and you would get 1, 2, 3, 4 with each read in register.
Now, you have in memory byte values (based on your statement that `ldrb` gives right result), eg
0x00000000: 01
0x00000001: 02
0x00000002: 03
0x00000003: 04
or same in one line
0x00000000: 01 02 03 04
So reading 8bit by ldrb gives you numbers 1, 2, 3, 4
But ldr would do read 32b value from memory (all 4 bytes at once) and you would get 32b value 0x04030201 in register.
Note: examples for little-endian systems
I am running a project using the ARM Embedded Tollchain on a stm32 microcontroller which uses the newLib.
I called assert(false) to test the assert output and ended in a Hard Fault Exception. I debugged into the assembly of assert(...) and found out that a subsequent call to _exit(1) jumps to a Address which is called _etext. Taking a look to the manpage of _etext shows that _etext is the address of the end of the .text section.
I am really confused. Normally I had supposed that _exit() is calling __exit() (which is defined as global symbol by the newLib) which I had implemented in a file named syscalls.c.
Why does _exit() jump to _etext?
Here are some cope snippets for a better understanding:
The subsequent call to _exit() by assert() taken from newLib 2.5:
_VOID
_DEFUN_VOID (abort)
{
#ifdef ABORT_MESSAGE
write (2, "Abort called\n", sizeof ("Abort called\n")-1);
#endif
while (1)
{
raise (SIGABRT);
_exit (1);
}
}
The disassembly of abort and assert. Take a special look to address 0808a10a where the jump to 80a5198 (_etext) is performed:
abort:
0808a100: push {r3, lr}
0808a102: movs r0, #6
0808a104: bl 0x808bfdc <raise>
0808a108: movs r0, #1
0808a10a: bl 0x80a51d8
0808a10e: nop
__assert_func:
0808a110: push {lr}
0808a112: ldr r4, [pc, #40] ; (0x808a13c <__assert_func+44>)
0808a114: ldr r6, [r4, #0]
0808a116: mov r5, r0
0808a118: sub sp, #20
0808a11a: mov r4, r3
0808a11c: ldr r0, [r6, #12]
0808a11e: cbz r2, 0x808a136 <__assert_func+38>
0808a120: ldr r3, [pc, #28] ; (0x808a140 <__assert_func+48>)
0808a122: str r2, [sp, #8]
0808a124: stmia.w sp, {r1, r3}
0808a128: mov r2, r4
0808a12a: mov r3, r5
0808a12c: ldr r1, [pc, #20] ; (0x808a144 <__assert_func+52>)
0808a12e: bl 0x808a5f4 <fiprintf>
0808a132: bl 0x808a100 <abort>
0808a136: ldr r3, [pc, #16] ; (0x808a148 <__assert_func+56>)
0808a138: mov r2, r3
0808a13a: b.n 0x808a122 <__assert_func+18>
0808a13c: str r0, [r3, #120] ; 0x78
0808a13e: movs r0, #0
0808a140: add r12, r11
0808a142: lsrs r2, r1, #32
0808a144: add r12, sp
0808a146: lsrs r2, r1, #32
0808a148: add r8, sp
0808a14a: lsrs r2, r1, #32
The lss-file which shows that 80a5198 is the address of _etext:
0808a0c0 <abort>:
808a0c0: b508 push {r3, lr}
808a0c2: 2006 movs r0, #6
808a0c4: f001 ff6a bl 808bf9c <raise>
808a0c8: 2001 movs r0, #1
808a0ca: f01b f865 bl 80a5198 <_etext>
808a0ce: bf00 nop
I'm just a super newbie like I just learn how to do this just for 12 hrs I was wondering why my loop is not stopping. Can you help me find what is wrong. I know this code is garbage, please bear with me.
So our task is to ask the user to ask the user input a string with max 80 characters and should end with period since it is our basis to know if it is the end of the string. The program will count the characters and words and display it, but in my case the program doesn't stop. Please help.
.ORIG X3000
LEA R0, PROMPT_ENTER ;Message for entering number.
PUTS
LEA R2, SENTENCE ;allocated memory
AND R3, R3, #0 ;setting R3 to zero for word counter.
ADD R3, R3, #1
AND R1, R1, #0 ;setting R4 to zero for char counter.
;---------ASKING USER TO INPUT A SENTENCE------
GET_USER_INPUT: ;loop for getting characters.
GETC
OUT
STR R0, R2, #0 ;r0 -> ( memory address stored in r2 + 0 )
PUT
ADD R2, R2, #1 ;increments the memory pointer
ADD R0, R0, #-10 ;decrements loop to proceed when pressed enter.
BRz COUNT_LENGTH
BRnp GET_USER_INPUT
;--------Element counter----
COUNT_LENGTH:
AND R0, R0, #0
LEA R4, SENTENCE
LDR R0, R4, #0
ADD R0, R0, #-10
BRz EMPTY
BRnp COUNT_ELEMENTS
EMPTY:
AND R0, R0, #0
LEA R0, PROMPT_NULL
PUTS
HALT
COUNT_ELEMENTS:
AND R0, R0, #0
LEA R4, SENTENCE
LDR R0, R4, #0
LD R6, TMNT
ADD R0, R0, R6
BRz END_OF_SENTENCE
LDR R0, R4, #0
LD R6, SPACE
ADD R0, R0, R6
BRz WORD_COUNT
ADD R4, R4, #1
ADD R1, R1, #1
BRnp COUNT_ELEMENTS
WORD_COUNT:
ADD R4, R4, #1
ADD R3, R3, #1
JSR COUNT_ELEMENTS
END_OF_SENTENCE:
AND R0, R0, #0
LDR R3, R3, #0
LD R5, ASCII
ADD R0, R0, R5
OUT
AND R0, R0, #0
LDR R1, R1, #0
ADD R0, R0, R1
OUT
HALT
SENTENCE .BLKW #80 ;initialize the array named sentence with length 80
TMNT .fill #-89
SPACE .fill #-32
ASCII .fill #48
;----MESSAGES------
PROMPT_ENTER .stringz "Enter the word(maximum 80 characters): \n"
PROMPT_AGAIN .stringz "Do you want to try again? Y/N: \n"
PROMPT_NULL .stringz "Error: Please enter a sentence!"
PROMPT_NOTMNT .stringz "Error: No terminating symbol (.) is expected at the end!"
PROMPT_DSPACE .stringz "Error: Multiple white space is not allowed!"
.END
I've only skimmed though this code.
it is an infinite loop because you reset R4 to point to the start of SENTENCE in each iteration of COUNT_ELEMENTS.
I can see in your code where you are incrementing R4 before going back to COUNT_ELEMENTS (btw JSR is only used to call a subroutine if you want to Branch unconditionally use BR).
You'd want to set R4 to point to SENTENCE only once. I do believe you can simply remove the LEA R4, SENTENCE within COUNT_ELEMENTS since it was set previously as part of COUNT_LENGTH.
In the future I would recommend pulling your code up in a lc3 simulator and stepping through it examining the values of the registers as you step though.
I'm using Armsim and I need to take some integers from a txt file and then I've to order and print them ordered in another txt file. How can I do? I mean, I managed to read the numbers, but I can't print them in order
Here's what I wrote:
.equ SWI_Open, 0x66 #open a file
.equ SWI_Close,0x68 #close a file
.equ SWI_PrChr,0x00 # Write an ASCII char to Stdout
.equ SWI_PrStr, 0x69 # Write a null-ending string
.equ SWI_PrInt,0x6b # Write an Integer
.equ SWI_RdInt,0x6c # Read an Integer from a file
.equ Stdout, 1 # Set output target to be Stdout
.equ SWI_Exit, 0x11 # Stop execution
.data
i: .asciiz "7.2in.txt"
o: .asciiz "7.2o.txt"
.text
_main:
ldr r0, =i
mov r1, #0
swi 0x66
mov r2, r0
ldr r0, =o
mov r1, #1
swi 0x66
mov r1, r2
bl copy
swi 0x11
copy:
mov r1, r0
mov r3, r2
mov r0, r2
swi 0x6c
loop:
mov r4, r0
mov r0, r2
swi 0x6c
cmp r0, #00
beq end
cmp r4, r0
ble no_scambio
mov r2, r3
mov r3, r1
mov r1, r0
mov r0, r3
swi 0x6b
mov r0, r1
mov r1, r3
mov r3, r2
b loop
no_scambio:
mov r2, r3
mov r2, r1
mov r1, r0
mov r0, r2
swi 0x6b
mov r0, r1
mov r1, r2
mov r2, r3
b loop
end:
mov pc, lr
I'm trying to get a STM32Cube project compiled using arm-none-eabi-gcc and a Makefile.
I have specified:
CFLAGS = -mthumb\
-march=armv6-m\
-mlittle-endian\
-mcpu=cortex-m0\
-ffunction-sections\
-fdata-sections\
-MMD\
-std=c99\
-Wall\
-g\
-D$(PART)\
-c
and:
LDFLAGS = -Wl,--gc-sections\
-Wl,-T$(LDFILE)\
-Wl,-v
The FW builds without problems.but when I boot the MCU i get stuck in Hard Fault.
Stack trace is:
#0 HardFault_Handler () at ./Src/main.c:156
#1 <signal handler called>
#2 0x0800221c in ____libc_init_array_from_thumb ()
#3 0x080021be in LoopFillZerobss () at Src/startup_stm32f030x8.s:103
#4 0x080021be in LoopFillZerobss () at Src/startup_stm32f030x8.s:103
Backtrace stopped: previous frame identical to this frame (corrupt stack?)
and I go straight to Hard Fault when stepping to bl __libc_init_array in the startup file.
/* Zero fill the bss segment. */
FillZerobss:
movs r3, #0
str r3, [r2]
adds r2, r2, #4
LoopFillZerobss:
ldr r3, = _ebss
cmp r2, r3
bcc FillZerobss
/* Call the clock system intitialization function.*/
bl SystemInit
/* Call static constructors */
bl __libc_init_array
/* Call the application's entry point.*/
bl main
Any ideas what could be wrong?
My arm-none-eabi-gcc version is 4.8.4 20140725 (release)
[edit]
The disassembly of the calls
08002218 <____libc_init_array_from_thumb>:
8002218: 4778 bx pc
800221a: 46c0 nop ; (mov r8, r8)
800221c: eafff812 b 800026c <__libc_init_array>
0800026c <__libc_init_array>:
800026c: e92d4070 push {r4, r5, r6, lr}
8000270: e59f506c ldr r5, [pc, #108] ; 80002e4 <__libc_init_array+0x78>
8000274: e59f606c ldr r6, [pc, #108] ; 80002e8 <__libc_init_array+0x7c>
8000278: e0656006 rsb r6, r5, r6
800027c: e1b06146 asrs r6, r6, #2
8000280: 12455004 subne r5, r5, #4
8000284: 13a04000 movne r4, #0
8000288: 0a000005 beq 80002a4 <__libc_init_array+0x38>
800028c: e2844001 add r4, r4, #1
8000290: e5b53004 ldr r3, [r5, #4]!
8000294: e1a0e00f mov lr, pc
8000298: e12fff13 bx r3
800029c: e1560004 cmp r6, r4
80002a0: 1afffff9 bne 800028c <__libc_init_array+0x20>
80002a4: e59f5040 ldr r5, [pc, #64] ; 80002ec <__libc_init_array+0x80>
80002a8: e59f6040 ldr r6, [pc, #64] ; 80002f0 <__libc_init_array+0x84>
80002ac: e0656006 rsb r6, r5, r6
80002b0: eb0007ca bl 80021e0 <_init>
80002b4: e1b06146 asrs r6, r6, #2
80002b8: 12455004 subne r5, r5, #4
80002bc: 13a04000 movne r4, #0
80002c0: 0a000005 beq 80002dc <__libc_init_array+0x70>
80002c4: e2844001 add r4, r4, #1
80002c8: e5b53004 ldr r3, [r5, #4]!
80002cc: e1a0e00f mov lr, pc
80002d0: e12fff13 bx r3
80002d4: e1560004 cmp r6, r4
80002d8: 1afffff9 bne 80002c4 <__libc_init_array+0x58>
80002dc: e8bd4070 pop {r4, r5, r6, lr}
80002e0: e12fff1e bx lr
80002e4: 08002258 .word 0x08002258
80002e8: 08002258 .word 0x08002258
80002ec: 08002258 .word 0x08002258
80002f0: 08002260 .word 0x08002260
[edit 2]
The register values from gdb:
(gdb) info reg
r0 0x20000000 536870912
r1 0x1 1
r2 0x0 0
r3 0x40021000 1073876992
r4 0xffffffff -1
r5 0xffffffff -1
r6 0xffffffff -1
r7 0x20001fd0 536879056
r8 0xffffffff -1
r9 0xffffffff -1
r10 0xffffffff -1
r11 0xffffffff -1
r12 0xffffffff -1
sp 0x20001fd0 0x20001fd0
lr 0xfffffff9 -7
pc 0x800067c 0x800067c <HardFault_Handler+4>
xPSR 0x61000003 1627389955
That __libc_init_array is ARM code, not Thumb, hence the M0 will fall over trying to execute some nonsense it doesn't understand (actually, it never quite gets there since it faults on the attempt to switch to ARM state in the bx, but hey, same difference...)
You'll need to make sure you use pure-Thumb versions of any libraries - a Cortex-M-specific toolchain might be a better bet than a generic ARM one. If you have a multilib toolchain, I'd suggest checking the output of arm-none-eabi-gcc --print-multi-lib to make sure you've specified all the relevant options to get proper Cortex-M libraries, and if you're using a separate link step, make sure you invoke it with LD=arm-none-eabi-gcc (plus the relevant multilib options), rather than LD=arm-none-eabi-ld.