I cannot get makefile to work - makefile

I have been fighting with makefile and I need help. I am running a virtual linux window in windows.
from a folder containing my main.c file, I type make and I get
$make
arm-linux-gnueabihf-gcc -g -Wall -I c:\intelFPGA\16.1\embedded\ip\altera\hps\altera_hps\hwlib\include _c main.c -o main.o
process_begin: CreateProcess(NULL, arm-linux-gnueabihf-gcc -g -Wall -I c:\intelFPGA\16.1\embedded\ip\altera\hps\altera_hps\hwlib\include _c main.c -o main.o, ...)failed.
make(e=2): The system cannot find the file specified.
make: *** [main.o] Error 2
This folder contains the following files and an empty folder.
main.c
Makefile
my_first_hps
If I type "where make", I get.
$where make
c:\intelFPGA_lite\16.1\nios2eds\bin\gnu\H-x86_64-mingw32\bin\make.exe
c:\intelFPGA\16.1\quartus\bin64\cygwin\bin\make.exe
c:\Coreutils\bin\make.exe
My Makefile is.
#
TARGET = my_first_hps
#
CROSS_COMPILE = arm-linux-gnueabihf-
CFLAGS = -g -Wall -I ${SOCEDS_DEST_ROOT}c:/intelFPGA/embedded/ip/altera/hps/altera_hps/hwlib/include
LDFLAGS = -g -Wall
CC = $(CROSS_COMPILE)gcc
ARCH= arm
build: $(TARGET)
$(TARGET): main.o
$(CC) $(LDFLAGS) $^ -o $#
%.o : %.c
$(CC) $(CFLAGS) -c $< -o $#
.PHONY: clean
clean:
rm -f $(TARGET) *.a *.o *~

I know it's a bit late but for those who get the same error, I just changed the following line:
CC = $(CROSS_COMPILE)gcc
to
CC = $(CROSS_COMPILE)gcc.exe
which has worked for me. Also don't forget that you should have Altera EDS and DS-5 installed. I installed DS-5 at the same place with EDS:

Related

Using Blas and Lapack libraries in Fortan90 on Linux

I am trying to use the Lapack and Blas libraries in my Fortran90 code on Linux Mint. I believe I have installed both libraries correctly in the following directory: /usr/local/lib
When I compile my code using a makefile I get the error message:
gfortran -m64 -O3 -fdefault-real-8 -fdefault-double-8 -c MainHPC2.f90
gfortran -m64 MainHPC2.o Central2Scheme.o Central5Scheme.o
WriteDataFiles.o -o P1
MainHPC2.o: In function `MAIN__':
MainHPC2.f90:(.text+0x2b0): undefined reference to `dgesv_'
collect2: error: ld returned 1 exit status
makefile:56: recipe for target 'P1' failed
make: *** [P1] Error 1
My Fortran code is simply trying to call a test function:
call dgesv(nn,nrhsl,al,ldal,ipivl,xl,ldbl,infol)
The makefile I am using is the following:
I believe it is not linking to the libraries properly.
FC = gfortran
FFLAGS = -m64 -O3 -fdefault-real-8 -fdefault-double-8
TARGET_ARCH =
LDFLAGS = -m64
BLIBS = -L/usr/local/lib -llapack -lblas
EXE = P1
.SUFFIXES:
.SUFFIXES: .o .f90 .plt
SRC = \
MainHPC2.f90 \
Central2Scheme.f90 \
Central5Scheme.f90 \
WriteDataFiles.f90 \
$(OBJECTS):
OBJ = ${SRC:.f90=.o}
$(EXE): $(OBJ)
$(FC) $(LDFLAGS) $(OBJ) $(LIBS) -o $(EXE)
%.o : %.f90
$(FC) $(FFLAGS) -c $<
# Define dependencies for modules
# $(OBJ): $(MOD)
clean:
rm -f *.mod *~ core
rm -f *.o
Thank you for your help.
Alex
solution 1
In your makefile, The sections that compile and link never add the $(BLIBS) which contains the BLAS and LAPACK libraries into the linking process.
$(EXE): $(OBJ)
$(FC) $(LDFLAGS) $(OBJ) $(LIBS) $(BLIBS) -o $(EXE)
solution 2
or you made a typo and wrote BLIBS instead of LIBS,
LIBS = -L/usr/local/lib -llapack -lblas
note: This should be more a comment than an answer

How to rename various file extensions to .o in makefile?

Hi I have this makefile:
CC = gcc
AS = nasm
CFLAGS = -ffreestanding -Wall -Wextra -std=c11 -m32 -nostdlib -nostdinc -fno-stack-protector
LDFLAGS = -m elf_i386 -T link.ld
ASFLAGS = -f elf32
SOURCES = $(wildcard src/*.c wildcard src/*.s)
OBJECTS = $(SOURCES:.[s|o]=.o)
INCLUDEPATH = -I inc src/include
OBJDIR = bin/obj
SRCDIR = src/
all: build
build:
ld $(LDFLAGS) $(OBJECTS) -o bin/kernel.bin
iso: build
cp bin/kernel.bin XeonOS/boot
grub-mkrescue -o XeonOS.iso XeonOS/
run: iso
quemu-system-i386 -m 512M -cdrom XeonOS.iso
clean:
rm -rf bin/*.o bin/kernel.bin
%.o: $(SRCDIR)%.c
$(CC) $(INCLUDEPATH) $(CFLAGS) $< -o $(OBJDIR)/$(OBJECTS)
%.o: $(SRCDIR)%.s
$(AS) $(ASFLAGS) $< -o $(OBJDIR)/$(OBJECTS)
And when i execute the command make run i get the following error:
ld -m elf_i386 -T link.ld src/kernel_c.c src/kernel_asm.s -o bin/kernel.bin
ld:src/kernel_c.c: file format not recognized; treating as linker script
Because the kernel_c.c and kernel_asm.s didn' change their extension to .o. How can i change the extension of both .s and .c to .o at the same time?
By the way, I will have another problem, the value of the OBJECTS variable contains the src/ directory but the object files are stored in the bin/obj folder, How can i change that?
When I had this problem last month I just did this:
SOURCES_C := $(wildcard src/*.c)
SOURCES_S := $(wildcard src/*.s)
OBJECTS := $(SOURCES_C:%.c=%.o) \
$(SOURCES_S:%.s=%.o)
I haven't looked at this too deeply but, as far as I know, that's your best bet.
Finally I used the #LightnessRacesinOrbit advice and also used patsubsr so the code is now working:
CC = gcc
AS = nasm
CFLAGS = -m32 -nostdlib -nostdinc -fno-builtin -fno-stack-protector -nostartfiles -nodefaultlibs -Wall -Wextra -Werror
LDFLAGS = -m elf_i386 -T link.ld
ASFLAGS = -f elf32
C_SOURCES = $(wildcard src/*.c)
C_OBJECTS = $(patsubst %.c,%.o, $(notdir $(C_SOURCES) ))
ASM_SOURCES = $(wildcard src/*.s)
ASM_OBJECTS = $(patsubst %.s,%.o, $(notdir $(ASM_SOURCES) ))
INCLUDEPATH = -I src/include
OBJDIR = bin/obj
SRCDIR = src/
.PHONY: build
all: build
build: $(C_OBJECTS) $(ASM_OBJECTS)
ld $(LDFLAGS) $(OBJDIR)/$(ASM_OBJECTS) $(OBJDIR)/$(C_OBJECTS) -o bin/kernel.bin
iso: build
cp bin/kernel.bin XeonOS/boot
grub-mkrescue -o XeonOS.iso XeonOS/
run: iso
bochs -f bochsconfig.cfg -q
clean:
rm -rf XeonOS/boot/kernel.bin
rm -rf bin/obj/*.o bin/kernel.bin
%.o: $(SRCDIR)%.c
$(CC) $(INCLUDEPATH) $(CFLAGS) $< -o $(OBJDIR)/$#
%.o: $(SRCDIR)%.s
$(AS) $(ASFLAGS) $< -o $(OBJDIR)/$#

Makefile causes `gfortran: error: No such file or directory`

I am trying to compile this code with gfortran.
Makefile:
# makefile for BIRRP
FC = gfortran
FCFLAGS = -g -fbounds-check
FLFLAGS = -g -fbacktrace
SRC = birrp.f coherence.f dataft.f diagnostic.f fft.f filter.f math.f rarfilt.f response.f rtpss.f utils.f weight.f zlinpack.f
# "make" builds all
PROGRAM = birrp
all: $(PROGRAM)
$(PROGRAM): $(SRC)
$(FC) $(FCFLAGS) $# $<
%.o: %.f
$(FC) $(FLFLAGS) -o $# $^
clean:
rm -f *.o
It doesn't work
gfortran -g -fbounds-check birrp birrp.f
gfortran: error: birrp: No such file or directory
Makefile:13: recipe for target 'birrp' failed
make: *** [birrp] Error 1
I am using the gfortran compiler. I have copied the Makefile from my other program.
After adding -o:
FC = gfortran
FCFLAGS = -g -c -fbounds-check
FLFLAGS = -g -fbacktrace
SRC = birrp.f coherence.f dataft.f diagnostic.f fft.f filter.f math.f rarfilt.f response.f rtpss.f utils.f weight.f zlinpack.f
# "make" builds all
PROGRAM = birrp
all: $(PROGRAM)
$(PROGRAM): $(SRC)
$(FC) $(FCFLAGS) -o $# $<
%.o: %.f
$(FC) $(FLFLAGS) -o $# $^
clean:
rm -f *.o
Now it just compiles
gfortran -g -c -fbounds-check -o birrp birrp.f
Why?
gfortran interprets birrp as a source-file, but you want it as the outfile.
man gfortran
says the outfile is specified by the -o parameter, so your target becomes this:
$(PROGRAM): $(SRC)
$(FC) $(FCFLAGS) -o $# $<
But this doesn't solve all your problems. According to the GNU Make manual $< specifies the first dependency and not all of them. You always want to have the whole list of dependencies, which would be $^.
So your target becomes this:
$(PROGRAM): $(SRC)
$(FC) $(FCFLAGS) -o $# $^

Makefile error, can't resolve include

I'm working with a project using flex/bison and trying to compile it using make. The lex.yy.c, tab.c, tab.h from flex/bison are generated correctly and placed in the obj directory. However, there is an error when trying to compile the obj/lex.yy.c file and it cannot resolve an include to a file in the src/frontend directory. Any ideas where I am going wrong? Makefile and output included below.
Makefile:
VPATH = src obj src/frontend src/interpreter
SRCS = lex.yy.c C.tab.c symbol_table.c nodes.c print_ast.c interpreter.c main.c
OBJS := $(SRCS:%.c=obj/%.o)
INCLUDES = -Isrc -Iobj -Isrc/frontend -Isrc/interpreter
CPPFLAGS = -Wall
LDFLAGS = -Wall
CC = gcc
LEX = flex
YACC = bison -d -t -v
all: bin/mycc
bin/mycc: $(OBJS)
$(CC) -g $(LDFLAGS) $(INCLUDES) -o $# $^
obj/lex.yy.c: C.flex obj/C.tab.h
$(LEX) -o $# $<
obj/C.tab.c: C.y
$(YACC) -o $# $<
obj/C.tab.h: obj/C.tab.c
#touch $#
obj/%.o: src/%.c
$(CC) -g $(CPPFLAGS) $(INCLUDES) -c $^
clean:
rm $(OBJS) obj/lex.yy.c obj/C.tab.c obj/C.tab.h
depend:
$(CC) -M $(SRCS) > .deps
cat Makefile .deps > makefile
Output:
bison -d -t -v -o obj/C.tab.c src/frontend/C.y
src/frontend/C.y: conflicts: 4 shift/reduce, 14 reduce/reduce
src/frontend/C.y:248.11-53: warning: rule useless in parser due to conflicts: external_declaration: function_definition
flex -o obj/lex.yy.c src/frontend/C.flex
gcc -Wall -c -o obj/lex.yy.o obj/lex.yy.c
src/frontend/C.flex:13:19: fatal error: token.h: No such file or directory
#include "token.h"
^
compilation terminated.
make: *** [obj/lex.yy.o] Error 1
The problem is that you define your -I flags for compiling in the variable $(INCLUDES) instead of in the normal $(CPPFLAGS). As a result, when the default rule for compiling C files runs, it does not use any of those -I flags and so the compiler can't find the include files. You can see the command line for the compiler in your output.
To fix it, get rid of the INCLUDES = line and add all of them to CPPFLAGS:
CPPFLAGS = -Wall -Isrc -Iobj -Isrc/frontend -Isrc/interpreter

My Makefile just doesnt work.

I have a makefile which is just not working. Can you guys help me to find where the error is? Thanks!
CC = gcc
FILES = workfile.c insert.c
TARGETS = exe
CFLAGS = -o
DBUG =
RM = rm -f
OBJS = *.o
#Master Rule
all: $(TARGETS)
#Build
exe: workfile.o insert.o
$(CC) $(CFLAGS) $(DBUG) workfile.o insert.o exe
#workfile
workfile.o: workfile.c
$(CC) $(DBUG) -c *.c
insert.o: insert.c
$(CC) $(DBUG) -c *.c
clean:
$(RM) $(TARGETS) $(OBJS)
The error is as follows
$make all
gcc -c *.c
gcc -o workfile.o insert.o exe
gcc: error: exe: No such file or directory
make: *** [exe] Error 1
I even tried changing the names of the targets. But did not help. Could not continue further.
I don't think it is a good idea to put -o in CFLAGS, I would rather to remove -o from it.
CFLAGS = -o -> CFLAGS =
Now you can work on your exe, the output path should follow -o immediately.
exe: workfile.o insert.o
$(CC) $(CFLAGS) $(DBUG) workfile.o insert.o exe
=>
exe: workfile.o insert.o
$(CC) $(CFLAGS) $(DBUG) -o exe workfile.o insert.o
So the full makefile should look like:
CC = gcc
FILES = workfile.c insert.c
TARGETS = exe
CFLAGS =
DBUG =
RM = rm -f
OBJS = *.o
#Master Rule
all: $(TARGETS)
#Build
exe: workfile.o insert.o
$(CC) $(CFLAGS) $(DBUG) -o exe workfile.o insert.o
#workfile
workfile.o: workfile.c
$(CC) $(DBUG) -o workfile.o -c workfile.c
insert.o: insert.c
$(CC) $(DBUG) -o insert.o -c insert.c
clean:
$(RM) $(TARGETS) $(OBJS)
Your CFLAGS is used wrongly. The -o option should go before exe and the CFLAGS should contain relevant flags for the compiler (-O3 -Wall -Wextra -Werror for example).
Try this:
CFLAGS = -Wall -Wextra -Werror
exe: workfile.o insert.o
$(CC) $(CFLAGS) $(DBUG) workfile.o insert.o -o exe
PS: You can strip the DBUG and stick the -g in CFLAGS when needed. This is how it is used in normal Makefiles.
Uh i got it... you have an -o in there in cflags. I think you shouldn't use -o in CFLAGS because it expects a parameter.
The important part that could be changed:
CFLAGS =
OUTFILE = fancy_exe
[...]
$(CC) $(CFLAGS) $(DBUG) workfile.o insert.o -o $(OUTFILE)
This should work better... or even skip the outfile varaible and put exe by hand.

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