I have created a makefile which is fully automatic. This means, I do not need to change makefile to run different programs.
Now what I want to do is put that makefile somewhere and call that makefile from directory where my program is. But condition is that makefile should run as if I have putted that makefile in directory where my program is created and NOT at place where makefile actually is.
You can run a Makefile from another location as if it was in the current directory with:
make -f /path/to/your/makefile
You can make an alias or function for it if you want.
Related
I have a large project with multiple subdirectories. In the parent directory, I have a CMakeLists.txt file which calls functions defined in other cmake files in the same parent directory. I have a custom Makefile in one of the subdirectories that contains some target "run". When I call cmake from the parent directory, I want the "run" target located in the subdirectory makefile to execute. How should I do this ?
I understand that some people have suggested to use add_custom_target and add_custom_command, but I am still confused as to how to apply these commands to accomplish this task.
If you know, which file(s) are produced by Makefile in the subdirectory, and want to depend on these files, use add_custom_command:
add_custom_command(OUTPUT <output-file>
COMMAND make run
WORKING_DIRECTORY ${CMAKE_CURRENT_SOURCE_DIR}/<subdir>
)
This assumes that your CMakeLists.txt have a target, which depends or uses given file.
Otherwise, if you do not care which files are produced by Makefile, use add_custom_target:
add_custom_target(<target_name> COMMAND make run
WORKING_DIRECTORY ${CMAKE_CURRENT_SOURCE_DIR}/<subdir>
)
In both cases WORKING_DIRECTORY specifies directory which should be current for command executed.
If you want the target (in the second case) to be executed by default, add ALL option before the COMMAND.
Are there any command line parameters for make to change to a directory before it does anything?
I have a case where I have to run make from a different directory than the Makefile. But since some source header include paths are relative to the Makefile directory, it cannot find those.
'make -C ' does the trick. It tells make to change directory before reading any makefiles as commented by Etan above.
I have a program called "PeakSplitter" that is executed by another program called "MACS". Following by the installation instruction, I have successfully installed "PeakSplitter" except the last step, which I didn't know how to do it. Here is the instruction.
Open up a command terminal, go to the directory "PeakSplitter_v1" where you have uncompressed PeakSplitter.
Within this directory, go to "SFL/Release" directory and run the makefile using
make (or make -f makefile)
Return to the directory "PeakSplitter_v1", then go to the "Zlib/Release" directory and run the makefile
make (or make -f makefile)
Now you are ready to install PeakSplitter. Return to the directory "PeakSplitter_v1", and run the makefile
make (or make -f makefile)
An executable file named "PeakSplitter" will be generated in this folder.
To run the program type ./PeakSplitter, and ./PeakSplitter --help in order to get some help on the input parameters.
You can move the "PeakSplitter" exe file to anywhere on your file system and set the PATH to this folder.
I think I have to move the "PeakSplitter" exe file to the MACS file system and set the PATH. Can anyone teach me how to do it?
Thank you very much!
there are C files in a directory and I have a makefile.
I usually use makefile to compile.
I have been wandering the role of the 'make clean'
'make clean' is just to remove files.
Though I didn't use 'make clean', t
he error and warning was shown up when there were something wrong.
I cannot realize why I need to use 'make clean' whenever I change the source file.
make is a utility is to determine automatically which pieces of a large program need to be recompiled, and issue the commands to recompile them.
To prepare to use make, you must write a file called the makefile that describes the relationships among files in your program, and the states the commands for updating each file.
Once a suitable makefile exists, each time you change some source files, this simple shell command:
make
suffices to perform all necessary recompilations. The make program uses the makefile data base and the last-modification times of the files to decide which of the files need to be updated.
We generally use make clean as a generic way to tell clean up the code.ie; remove all the compiled object files from the source code. You can name it as anything you like.
It's convention only. The convention is that clean will return you to a state where all you have is the "source" files. In other words, it gets rid of everything that can be built from something else (objects, executables, listings and so on).
So make clean ; make is expected to build everything from scratch. And, in fact, you'll often find a rule like:
rebuild: clean all
which will do both steps for you.
You should never have to do a clean unless you're wanting to (for example) copy just the source files somewhere. If you have to do so after editing a file, then your Makefile is not set up correctly.
And, if you make and get an error, you should get exactly the same error if you subsequently make without fixing said error.
I'm working on modifying a huge recursive makefile project that has 6000+ source files. All of which are clearcase controlled. Since I don't want to copy the whole source tree, I'm trying to create a new project only containing the modified source files and thus pull the source from the original tree if they don't exist in my modified tree.
I have already modified the makefile in ModDir to check if each folder exists locally and execute make in that folder if it does. Otherwise it executes make in the sourceDir. My issue lies in the subdir makefiles.
Each subdir makefile contains a list of all of the source files needed for that module. I need to find a way to build the file locally if it exists, else build the file from SourceDir/subdir.
I.e. in my image, the Dir1 makefile needs to build F1 from ModDir/Dir1/F1, and build the other files from SourceDir/Dir1/F2-F3.
I tried to use VPATH to tell make to locate the source files in both locations (ModDir first of course) which works beautifully. However, since make assumes the object files are in the ModDir, it can't find any of the object files built in SourceDir.
I also tried making a pre-build rule to modify the make file list with bash, but I don't know if that's even possible.
How do I use make to build from one directory if the source file exists (ModDir), otherwise build from another (SourceDir)?
The easiest way will be to put your "if ... then ... else" logic in an external bash or batch (whichever OS you use) script and swap makefiles before calling make