How can I use gcc's automatic dependency generation while being able to move source files? - gcc

Question

Consider a simple project that has sources in two different directories: src for hand-written code and gen for generated code.
Makefile:
foo: foo.o main.o
gcc $^ -o $#
COMPILE = gcc -MD -MP -MF $(#:.o=.d) -Isrc -Igen -c $< -o $#
%.o: src/%.c
$(COMPILE)
%.o: gen/%.c
$(COMPILE)
-include $(wildcard *.d)
src/main.c
#include "foo.h"
#include <stdio.h>
int main() {
printf("%d\n", foo());
return 0;
}
src/foo.h
int foo(void);
src/foo.c
#include "foo.h"
int foo() {
return 42;
}
This works great, including the dependency tracking:
$ make
gcc -MD -MP -MF foo.d -Isrc -Igen -c src/foo.c -o foo.o
gcc -MD -MP -MF main.d -Isrc -Igen -c src/main.c -o main.o
gcc foo.o main.o -o foo
$ touch src/foo.h
$ make
gcc -MD -MP -MF foo.d -Isrc -Igen -c src/foo.c -o foo.o
gcc -MD -MP -MF main.d -Isrc -Igen -c src/main.c -o main.o
gcc foo.o main.o -o foo
-MP even lets me move a header to gen/ without breaking the build:
$ mv src/foo.h gen/
$ make
gcc -MD -MP -MF foo.d -Isrc -Igen -c src/foo.c -o foo.o
gcc -MD -MP -MF main.d -Isrc -Igen -c src/main.c -o main.o
gcc foo.o main.o -o foo
But unfortunately, I can't move non-headers without everything breaking:
$ mv src/foo.c gen/
$ make
make: *** No rule to make target 'src/foo.c', needed by 'foo.o'. Stop.
That's because the GCC-generated dependency rules look like this:
$ cat foo.d
foo.o: src/foo.c /usr/include/stdc-predef.h gen/foo.h
/usr/include/stdc-predef.h:
gen/foo.h:
The foo.o: src/foo.c dependency prevents make from using gen/foo.c after I've moved it. If it weren't there, everything would work:
$ sed -i 's|src/foo.c ||' foo.d
$ make
make: 'foo' is up to date.
Is there a way to get this to work automatically, either with different GCC flags or by changing the Makefile somehow?

Answer 1

You are using dependencies in an unusual way (I don't want to say wrong ;) ). The first time through your compile works from the pattern rules only, as the dependency file is not yet present. After that you are desynchronized as you are moving files around and after that invoke a build with the old dependency file which carries the wrong path info. Make wasn't designed to run without proper and rigid target information as that would lead to completely uncontrolled builds - why not compile the file anotherproject/notyourbusiness/foo.c if the name fits somehow? (*)
So, if you want to do this, you are rightfully forced to program it explicitly as any implicit functionality would render make completely useless. You could use VPATH (set it to the directories where your sources may appear and remove the path info from the prerquisites in the dependency files) to locate your sources but note that even this one wasn't added for the purpose of catching elusive project scopes.
All in all I would dare to say that if the location of your source files poses such a big hassle during the whole project, you are in for rough times - that is not say that a flexible makefile which allows such configuration changes would be a bad thing, just don't install such behaviour as "normal" build steps.
(*) Of course dependency generation is allowed to lag one cycle behind, but that is not the same as moving the targets around in an uncontrolled manner.