Arduino Yun - UART Through USB Host to Nexys 4 DDR FPGA Board - vhdl

I'm working on a project that requires reading and writing data to an SD card, and I want to make the algorithms that evaluate incoming data in hardware. I found out that the only way to read/write to an SD card through my FPGA board would be to implement a processor and then write software, which would defeat the purpose of using the FPGA board in the first place.
So, I've decided that I'm going to use my Arduino Yun to read information from a micro SD card, and then encode it into binary and send each piece of data to the FPGA in UART.
(The data consists of base pairs in DNA, so I'm making each base pair take up four bits, and making it into more of a logic map rather than any kind of ASCII map or anything - the details of this choice aren't very important, but it makes using UART and binary valid for this application.)
However, the only thing that can carry the UART signal for the FPGA board is the micro USB slot, so I have to plug a cable into that, and the other end of it into the USB Host of the Arduino.
I've come to understand that the Yun's USB Host is connected solely to the on-board Linux processor, and while I understand that this means that I need to install various packages onto the micro SD card that I've used to extend the Yun's memory, I'm not sure what packages to use, or even how to go about using them.
Could anyone point me in the direction of libraries/packages that I should install, and what sort of code I should write to implement this functionality?
Any help would be greatly appreciated.
Please let me know if I've left out any details!

Related

Asking about FPGA design with IP cores

I am new to Verilog, also FPGA, and currently working on the project involved them. I am conducting channel coding blocks for a broadcast standard DVB-S2 including BCH encoder, scrambler and BBheader insertion. I'm using Vivado 2015.4 for hardware design and Zynq-7000 ZC702 evaluation kit, and I wonder:
Is it necessary to connect my IP cores which are the blocks with the Processing unit(for Vivado 2015.4 is ZynQ-7000) for implementation?
Do I have to generate the bit stream to export it to SDK for software developing. I really don't know what is the purpose for exporting to SDK when you all have designed your IP on Vivado.
Can anyone give me an example flow of designing a BBheader insertion(which is more like adding the flags bits in front of the desired data for recognition).
What I just want is to read the data from Block ROM and encode those data (which is video but then converted into bin or hex file) with my IP cores.
1) If you intend to make use of the processor to run software, you need to connect it to the IP block somehow, or you'll have no way of interfacing the two.
2) Exporting the bitfile to the SDK tells the SDK which pins of the CPU are being used, which is necessary knowledge for development.
3) Though I can't give you a specific answer for this, I suggest reading the IP core documentation and it might naturally become clear.

How windows progran can transmit an input and get an output to an FPGA

I am new to programming and FPGA. I like to run a program on my windows 10 PC and like to send input to the FPGA and when processing is done I like to receive output to the same program. Is it possible and how it can be achieved. I need some direction to start finding a way.
Thank you.
I recommend you to buy a Digilent Arty A7 board. It is low cost and very nice to work with.
To communicate with a PC/Windows you can use the USB to UART that you have on that board. However I think the best and easiest way to do it is to use an IP core that has support for Ethernet and TCP/IP. Using TCP/IP is very simple on the PC side using Python, Matlab, Telnet or any programming tool.
The best IP for the Xilinx FPGA that I have found so far is the ones from fpga-cores.com. There you only have to implement an AXI4 Stream to communicate with the client. I don't think it gets easier than that.
That core also include remote programming of the FPGA over Ethernet and a logic analyzer. All that is for free.
Good question. A lot of people ask about data processing on FPGA but never think about how to get the data to and from it. (Until it is too late)
The best way is to find an FPGA which has also has an SOC. That is: a processor, DDR interface and one or more high speed interfaces. Ethernet, USB, PCIe. Make sure they come with complete working example code, often some RTOS.
As to which FPGA to choose greatly depends on what you want it to do. You also need to have enough programmable gates to implement the function you want.
Nowadays all vendors have free HDL compilers up to a certain size FPGA.
Every FPGA manufacturer also has one or more prototyping boards, but the price of those varies a lot.
If you have some FPGA code which is capable of very high data throughput your interface is likely to become the bottleneck.
A PCIe board offers the highest data throughput, but for that you need to have matching drivers on both the FPGA board and the PC. In that case check that it has example drivers for the PC side too.
Yes, I fell into that trap a few years back

Connect stack of Parallela boards and a rPI via FPGA and 1/0 pins

I want to conect my Pi and Parallella such that the Pi does the GPU side and the Parallella stack this is to be controled by a third Parallella
I think the best way to do this is through an FPGA. Is this possible and a good way to do it?
Also what structure should I use and how should I start to implement it?
I know little VHDL and Verilog and do not want to use paid software.
I am eager to learn and have a lot of time to do it though so no "simple but bad solutions".
I will up load the project on Git when done
The solution depends on the bandwidth and latency requirements. You are right that FPGA provides the largest bandwidth and lowest latency. However, do you really need such good performance? Maybe USB or Ethernet connections are good enough.
For the FPGA solution, consider the secondary pi and parallella as two peripherals for the primary pi, and assign different address spaces for them. The communications among three devices are based on polling initiated by the primary pi. FPGA should pass the signaling on data/address bus to the two peripherals with compatible I/O timing. Peripherals consider the FPGA as a RAM, and should listen to any data/controls with their best effort. FPGA should buffer the data/control signals if peripherals cannot respond in real-time.
Overall, it's a very tough work. I'd like to see the source code if the FPGA solution works.

Is there anyway to read the board serial number from a altera Cyclone V FPGA?

Is there anyway to read the board serial number from a Cyclone V FPGA?
Sorry this came in a bit late, but I'm writing for the sake of those still interested.
First, store the board's serial number somewhere, e.g. an EEPROM or a Flash chip on the board. Then, get your FPGA to read that data from the storage device. That's probably the simplest solution I can think of, and works well if you're not concerned about anyone tampering with the storage device (or say, resoldering their own storage device with their own data).

Accessing audio out in Windows

I am looking to write an Arduino script that uses whatever audio signal is going to the speakers to create a physical visualization.
The Arduino is connected to the windows machine only through USB, so I need to use USB to find out what is being sent to the speakers. How would I access this information?
As of right now, the Arduino can only communicate with the computer via serial over USB. Things have changed with the new Arduino Uno, but the examples have not yet been released to show how to have the new Arduino act as other USB devices.
You would have to write something for the Windows box that monitor's the system audio and sends the info about it over serial to the Arduino, as long as you want it to only connect via USB.
There isn't a very good way to interface an audio signal to an Arduino without some external hardware.
One way to do it though would be to connect the audio line to a biased pin with a capacitor, then you could use the ADC directly. There will be pretty terrible dynamic range, but it only takes 3 passive parts. Running that through an opamp before going to the ADC pin could significantly improve dynamic range and provide a filtering opportunity (see below). Alternatively, you could switch on an on-chip voltage reference to use (typically 1-1.5 V) instead of the main supply.
It doesn't matter that much for a straight visualization, but the sample rate will not be good enough to capture the full spectral content of the audio (in addition to the poor dynamic range resolution). The default Arduino sample rate is 10 kHz(-ish...possibly asynchronous), so you will only get valid data if your signal is below 5 kHz, otherwise aliasing will muck it up. (If you write your own analog driver for the ATmega32P you could get up to 76 kHz sample rate with 8-bit samples)
Then to actually communicate that data to a computer, you can fairly easily throw all those ADC values onto the UART for the computer to pick up and process as it sees fit. An ATmega will not have the power to compute FFTs on the fly (what you'd do almost always do for a viz anyways).
Or to skip all that, connect the audio signal to your computer's sound card (or USB sound card...they're pretty nice) and use some audio driver.
There is a Java library for processing called ESS that lets you access audio out.

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