Is is possible to generate an (.ll) file from halide code? - halide

Is is possible to generate an (.ll) file from halide code ?
Only way I found to do that was through HL_DEBUG_CODEGEN=2
but that generates alot of architecture related code.
In other words, is there anyway to get llvm code for a specific image processing kernel and its scheduling?

To skip the support code use the -no_runtime target flag. If you're using a Generator, then you want something like ./mygenerator -g foo -e bitcode -o . target=host-no_runtime
You can generate even leaner bitcode with more target flags. When I just want to see the inner loop I use: host-no_runtime-no_bounds_query-no_asserts-disable_llvm_loop_unroll-disable_llvm_loop_vectorize
If you're not using a Generator you want Func::compile_to_llvm_assembly

Related

Coverity static analysis for C programs

I am new to Static analysis tool and I am trying to build a simple checker. When I am throwing a OUTPUT_ERROR, I am also getting some more details with tags like "cond_true" etc. Is there a way I can stub these and print only the error I want to see.
Thanks.
First You have to use cov-build to create intermediate files.With this command u have to specify the make (makefile). After that It will create emit file where you mentioned in cov-build command.
Then You have to use cov-analyze to create analyze report.If there is any Bugs found means it will return on terminal.
To show that errors in html file you have to use cov-format-errors.This command will create error directory.In that directory you can find the html statistical report for your analyzed code..
Example commands:
(if the program is in same folder(bin), it will create emit file in current directory(bin/emit)).
cov-build --dir . gcc hi.c
(if you want to build for a single .c file)
OR
cov-build --dir . make
(to use make command You have to create makefile.(vi makefile in bin,write your own script about compiling programs which is going to be build by cov-build))
cov-analyze --dir .
cov-format-errors --dir .
This question is asking about writing a checker using the Extend SDK. There are two kinds of Extend checkers, flow-sensitive and flow-insensitive. The Extend documentation explains how to choose the kind of checker. Flow-sensitive checkers emit the cond_true events because they show the specific control flow path along which the issue was found; they cannot be suppressed. Flow-insensitive checkers do not emit them, so perhaps that is what you want to use.

Function in gcc source code

Can any one tell me which function in gcc source code is responsible for finding a macro in C file and repalce it with actual value ?
I want to know the function as I have to take log by making changes to it, so that at the end my log file will contain where all macro is used and its line number .
It's done by the preprocessor, prior to generating the output file. If you want to see what it is doing, try gcc -E
From man gcc:
-E Stop after the preprocessing stage; do not run the compiler proper.
The output is in the form of preprocessed source code, which is sent to
the standard output.
I recommend using clang for this type of task. It is pretty well documented and you don't need to change its source, as it's extendable with a plugin system.
In your case you create a plugin based on the PPCallbacks class and override its MacroExpanded method, and any other method you find useful. This is an easy starting point.

How do I run the GCC preprocessor to get the code after macros like #define are expanded?

Is there an option that the GCC preprocessor could generate C source code and filter out irrelevant source code?
For example, a .c file has a #define switch to define for many different platforms. I'm only interested in one platform, and I want the C preprocessor to filter out unrelated code.
Does GCC support this?
Yes. Use the -E option:
gcc -E foo.c
While the -E option will perform all pre-processing, it also produces some very 'raw' output that might not be what you want (depending on what you want).
If you need to debug a macro expansion that's not doing what you expect, E is a good way to go. If you simply want to filter out the 'inactive code', but leave the remaining code in more-or-less original form, you might want to look at the answers to the following Stack Overflow question:
Is there a C pre-processor which eliminates #ifdef blocks based on values defined/undefined?
It sounds like you want unifdef, not the GCC preprocessor.

Debugging a Makefile

Let me prefice this question with the comment that I know very little about Makefiles or make.
There is a very large project that is automatically built nightly. It is built in both Debug and Release mode, Debug being used for utilities like Valgrind to provide code analysis. Somehow, some of the built libraries are losing the debug flag during the make process, which makes some analysis output unhelpful. I was tasked with finding the bug and I need some suggestions on how to go about locating/repairing the issue.
Thanks in advance
make itself also supports a debug flag, -d; depending on how your Makefiles call each other, it may be possible to pass it through (and if not, you can rewrite them to do so with a script); then if you feed the resulting output to a file you can start looking for clues.
Given the sparse information, I can only sketch a very general strategy based on what I've seen in terms of Makefile usage for a handful of large projects.
If you don't already know where the flags originate, search through the Makefiles to find out.
Something like:
find . -name Makefile -exec grep -nH -- -g {} \;
(Adjusting the -name pattern if your project uses included Makefiles like foo.mk or bar.mak or something. And adjusting the "-g" if your debug flag is something else.)
You'll probably find it assigned to a variable like CFLAGS. Look around the spot where this variable is assigned, it is probably set conditionally (e.g. ifeq($(RELEASE),1)).
Now look at the Makefile(s) in the library that isn't getting those flags. Find the spot where the compile command lives. Is it using the right variable? Are these Makefiles overriding the variable?
It may also be helpful to capture the output of a build to a file and search around for any other places that might not have the debug flags set.
use remake, its really good

Is there a way to strip all functions from an object file that I am not using?

I am trying to save space in my executable and I noticed that several functions are being added into my object files, even though I never call them (the code is from a library).
Is there a way to tell gcc to remove these functions automatically or do I need to remove them manually?
If you are compiling into object files (not executables), then a compiler will never remove any non-static functions, since it's always possible you will link the object file against another object file that will call that function. So your first step should be declaring as many functions as possible static.
Secondly, the only way for a compiler to remove any unused functions would be to statically link your executable. In that case, there is at least the possibility that a program might come along and figure out what functions are used and which ones are not used.
The catch is, I don't believe that gcc actually does this type of cross-module optimization. Your best bet is the -Os flag to optimize for code size, but even then, if you have an object file abc.o which has some unused non-static functions and you link statically against some executable def.exe, I don't believe that gcc will go and strip out the code for the unused functions.
If you truly desperately need this to be done, I think you might have to actually #include the files together so that after the preprocessor pass, it results in a single .c file being compiled. With gcc compiling a single monstrous jumbo source file, you stand the best chance of unused functions being eliminated.
Have you looked into calling gcc with -Os (optimize for size.) I'm not sure if it strips unreached code, but it would be simple enough to test. You could also, after getting your executable back, 'strip' it. I'm sure there's a gcc command-line arg to do the same thing - is it --dead_strip?
In addition to -Os to optimize for size, this link may be of help.
Since I asked this question, GCC 4.5 was released which includes an option to combine all files so it looks like it is just 1 gigantic source file. Using that option, it is possible to easily strip out the unused functions.
More details here
IIRC the linker by default does what you want ins some specific cases. The short of it is that library files contain a bunch of object files and only referenced files are linked in. If you can figure out how to get GCC to emit each function into it's own object file and then build this into a library you should get what you are looking.
I only know of one compiler that can actually do this: here (look at the -lib flag)

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