How to fix WHILE directive when using GCC? - gcc

Question

In my former workplace, we used to develop a lot of our ARM v7 assembly codes with Keil muvision IDE. It became very common for me to abuse the WHILE directive for parametrisable duplication of code lines (see example, which works in Keil IDE).
I now want to port some of these codes to make them run on my raspberry pi. I managed to solve every issues that I could face when leaving the ease that keil IDE can provide but I am struggling with this last part. GCC won't recognise any of the WHILE directive instruction (WHILE, WEND,GBLA,etc). Any idea how to work around that problem or is there any equivalent to WHILE directives that would not affect the timings nor the code size?
I compile by invoking the following command:
gcc main.c *.h *.S -o exe
GBLA var
var SETA 0
WHILE var < DEFINED_VALUE
LDR R4, [R7, #var*4]
EOR R4, R4, R5, LSL #16
STR R4, [R0, #var*4]
var SETA var+1
WEND

Answer 1

You can use the directives .set, .rept/.endr and .set to achieve what you want.
Example:
.set var, 0
.rept 5
LDR R4, [R7, #var*4]
EOR R4, R4, R5, LSL #16
STR R4, [R0, #var*4]
.set var,var+1
.endr
The result is as follows:
$ gcc test.s -o test.o -c
$ objdump -d test.o
test.o: file format elf32-littlearm
Disassembly of section .text:
00000000 <.text>:
0: e5974000 ldr r4, [r7]
4: e0244805 eor r4, r4, r5, lsl #16
8: e5804000 str r4, [r0]
c: e5974004 ldr r4, [r7, #4]
10: e0244805 eor r4, r4, r5, lsl #16
14: e5804004 str r4, [r0, #4]
18: e5974008 ldr r4, [r7, #8]
1c: e0244805 eor r4, r4, r5, lsl #16
20: e5804008 str r4, [r0, #8]
24: e597400c ldr r4, [r7, #12]
28: e0244805 eor r4, r4, r5, lsl #16
2c: e580400c str r4, [r0, #12]
30: e5974010 ldr r4, [r7, #16]
34: e0244805 eor r4, r4, r5, lsl #16
38: e5804010 str r4, [r0, #16]
See also: Useful assembler directives and macros for the GNU assembler.