Telling make that targets will be in a subfolder - makefile

Question

I have a project with this toy structure:
src:
obj1.cpp
obj2.cpp
obj:
(empty folder)
which I want to compile into a library using make. What I want to write in my makefile is something along the lines of:
mylib.a: obj1.o obj2.o
ar $# $^
And this works, however it leaves the folder messy, as it results in this structure:
obj1.o
obj2.o
mylib.a
src:
obj1.cpp
obj2.cpp
obj:
(empty folder)
What I would prefer is that the result of the call would be something like this:
mylib.a
src:
obj1.cpp
obj2.cpp
obj:
obj1.o
obj2.o
where both obj sources are compiled into .o objects in obj. I tried doing this in my makefile:
vpath %.o obj
mylib.a: obj1.o obj2.o
but this has the same result as above. So, I figures, well sure, the implicit rule for obj1.o doesn't know where to output, right? OK, so I added this rule:
%.o: %.cpp
g++ $^ -o obj/$#
to ensure that I am compiling into obj, however, now, the make command fails, and I understand why it fails. It fails because mylib finds obj1.o, as in it finds the rule for it, it executes the rule, but the rule does not result in the existence of obj1.o, but rather in the existence of obj/obj1.o, and so when mylib is composed, its rule says ar obj1.o obj2.o and it fails.
So, my question is: is there a simple and elegant way to avoid this problem?
One solution I see is to always have some file, empty if need be, named obj1.o in obj, but that seems ugly to me. Another would be to add
"obj/" to every object going to mylib.a, but that means duplicating code and is even uglier. So, what would be the best way to solve this?

Answer 1

vpath and VPATH are not intended for targets, they are for sources. Using them to tell make where the object files should go is not a good idea. The easiest solution is probably a pattern rule:
obj/%.o: src/%.c
<your compilation rule>
Based on this you can elaborate a bit:
SRCDIR := src
OBJDIR := obj
SRCS := $(wildcard $(SRCDIR)/*.c)
OBJS := $(patsubst $(SRCDIR)/%.c,$(OBJDIR)/%.o,$(SRCS))
mylib.a: $(OBJS)
<your library building recipe>
$(OBJDIR)/%.o: $(SRCDIR)/%.c
<your compilation recipe>
clean:
rm -f $(OBJS) mylib.a
And of course, in your recipes, do not hesitate to use the automatic variables and the variables you declared yourself like OBJS, for instance. Examples:
mylib.a: $(OBJS)
$(AR) $# $^
$(OBJDIR)/%.o: $(SRCDIR)/%.c
$(CC) $(CFLAGS) -c $< -o $#