i was compiling a kernel module thermal.c at an ARCH linux distro using Makefile
Makefile:
obj-m += thermal.o
all:
make -C /lib/modules/$(uname -r)/build/ M=$(PWD) modules
clean:
make -C /lib/modules/$(uname -r)/build/ M=$(PWD) clean
the make command output is:
make -C /lib/modules//build/ M=/home/user/dir modules
make[1]: *** /lib/modules//build/: No such file or directory. Stop.
make: *** [Makefile:4: all] Error 2
uname -r output : 5.6.8-arch1-1
make expands the recipes before passing them to the shell. In your case make replaced $(PWD) by the value of the make variable named PWD (correct) but it also replaced $(uname -r) by the value of the make variable named uname -r. As there was no such make variable defined, the result was the empty string. Using $$(uname -r) solves the problem because make expands it as $(uname -r), exactly what you want to pass to the shell.
In summary, you must escape the $ you want to preserve from the make expansion by doubling them:
all:
make -C /lib/modules/$$(uname -r)/build/ M=$(PWD) modules
clean:
make -C /lib/modules/$$(uname -r)/build/ M=$(PWD) clean
Related
I am trying to insert a kernel module using depmod and modprobe utilities in-order to resolve any dependencies. When I build the module it throws "Warning: modules_install: missing 'System.map' file. Skipping depmod."
And later when I try to execute modprobe it throws an error saying
"modprobe: FATAL: Module i2c_eeprom_client.ko not found in directory /lib/modules/4.19.58-v7+"
Below is the make file I am using:
obj-m += i2c_eeprom_client.o
KDIR = /lib/modules/$(shell uname -r)/build
all:
make -C /lib/modules/$(shell uname -r)/build M=$(PWD) modules
make -C $(KDIR) M=$(PWD) modules_install
clean:
make -C /lib/modules/$(shell uname -r)/build M=$(PWD) clean
And below is the output of build:
make -C /lib/modules/4.19.58-v7+/build M=/home/pi/work/eeprom modules
make[1]: Entering directory '/usr/src/linux-headers-4.19.58-v7+'
Building modules, stage 2.
MODPOST 1 modules
make[1]: Leaving directory '/usr/src/linux-headers-4.19.58-v7+'
make -C /lib/modules/4.19.58-v7+/build M=/home/pi/work/eeprom
modules_install
make[1]: Entering directory '/usr/src/linux-headers-4.19.58-v7+'
INSTALL /home/pi/work/eeprom/i2c_eeprom_client.ko
DEPMOD 4.19.58-v7+
Warning: modules_install: missing 'System.map' file. Skipping depmod.
make[1]: Leaving directory '/usr/src/linux-headers-4.19.58-v7+'
How can i fix this problem ? Please help
Platform : Raspberry PI 3b+, Raspbian - linux 4.19.58-v7+
You can run depmod after the modules_install step. Also, it is better practice to separate the installation from the building to avoid having to build with root privileges:
obj-m += i2c_eeprom_client.o
# Default to running kernel's build directory if KDIR not set externally
KDIR ?= "/lib/modules/$(shell uname -r)/build"
all:
$(MAKE) -C "$(KDIR)" M="$(CURDIR)" modules
install:
$(MAKE) -C "$(KDIR)" M="$(CURDIR)" modules_install
depmod -A
clean:
$(MAKE) -C "$(KDIR)" M="$(CURDIR)" clean
Invoke as:
$ make
$ make install
I have Kernel module sources (for arm) and I would like to compile two different drivers from the same source.
The kernel in compiled with 2 source files and with cross compile.
MODULE_MAME = modulename
SRCS = drv/source.c lib/libsrc.c
OBJS = $(SRCS:.c=.o)
obj-m += $(MODULE_MAME).o
$(MODULE_MAME)-y = $(OBJS)
KDIR := /mykermelsources/
PWD := $(shell pwd)
all:
$(MAKE) -C $(KDIR) ARCH=arm M=$(PWD) modules
clean:
$(MAKE) -C $(KDIR) ARCH=arm M=$(PWD) clean
In one command, I would like to compile 2 modules.
Two choices:
Keeping 3 different Makefiles, one main that will call both other makefiles. One problem with this, I cannot make it working. make -f makefilediff or make --makefile=makefilediff give me an error.
Log:
make -C /mykermelsources/ ARCH=arm M=/home/mychardriver/ modules
make[1]: Entering directory '/mykermelsources'
scripts/Makefile.build:44: /home/mychardriver/Makefile: No such file or directory
make[2]: *** No rule to make target '/home/mychardriver//Makefile'. Stop.
make[1]: *** [_module_/home/mychardriver/] Error 2
make[1]: Leaving directory '/mykermelsources'
make: *** [all] Error 2
Transmitting command line parameter but it doesn't work. make SIDE=1
Seems the SIDE parameter/variable is never transmitted.
ifeq ($(SIDE),1)
MODULE_MAME = modulename_11
else
MODULE_MAME = modulename_22
endif
SRCS = drv/source.c lib/libsrc.c
OBJS = $(SRCS:.c=.o)a
obj-m += $(MODULE_MAME).o
$(MODULE_MAME)-y = $(OBJS)
KDIR := /mykermelsources/
PWD := $(shell pwd)
all:
$(MAKE) -C $(KDIR) ARCH=arm M=$(PWD) SIDE=$(SIDE) modules
clean:
$(MAKE) -C $(KDIR) ARCH=arm M=$(PWD) clean
How can I build 2 kernel modules from same multiple source files ?
Just faced this issue, and this is what I did:
For each moduleX you want to build, write a Kbuild_moduleX with the targets. Example:
obj-$(MODULE) += MODULE.o
MODULE-y := source.o
Then, in your Makefile_moduleX, do:
all:
cp Kbuild_moduleX Kbuild
make -C /lib/modules/$(shell uname -r)/build M=$(shell pwd) modules
rm Kbuild
This works because the kernel scripts will give Kbuild priority over reading Makefile.
To compile, do make -f Makefile_moduleX
Is it pretty? No. Does it work? Yes.
I have working kernel module which I install manually with insmod/modprobe command as learnt by reading book. however I was wondering if there is way to do it automatically after compiling - So basically how to automate insmod/modprobe command ?
My modprobe has a dependent file thread_module.o as well
My make file so far
obj-m := wakeup_counter.o
obj-m += thread_module.o
$INSTALL_MOD_PATH = /lib/modules/2.6.32-5-amd64/
all:
make -C /lib/modules/2.6.32-5-amd64/build M=$(PWD) modules
install:
make $(INSTALL_MOD_PATH) =/build modules_install
clean:
make -C /lib/modules/2.6.32-5-amd64/build M=$(PWD) modules
output after running : make install
root#xyz:/home/xyz/Desktop/Drivers/symbols# make install
make -C /lib/modules/2.6.32-5-amd64/build M=/home/xyz/Desktop/Drivers/symbols modules_install
make[1]: Entering directory `/usr/src/linux-headers-2.6.32-5-amd64'
INSTALL /home/xyz/Desktop/Drivers/symbols/thread_module.ko
INSTALL /home/xyz/Desktop/Drivers/symbols/wakeup_counter.ko
DEPMOD 2.6.32-5-amd64
make[1]: Leaving directory `/usr/src/linux-headers-2.6.32-5-amd64'
Edit: After going through comments and https://www.kernel.org/doc/Documentation/kbuild/modules.txt I tried to add install command but I dont see any modules in the build path - Also at high level I get what we write in cmd prompt we type in Makefile but if someone can give an example it would help me to understand with nice base case to refer.
obj-m := wakeup_counter.o
obj-m += thread_module.o
KDIR = /lib/modules/2.6.32-5-amd64/build
all:
make -C $(KDIR) M=$(PWD) modules_install
clean:
make -C $(KDIR) M=$(PWD) clean
Example of command shell instruction being used as rule in Makefile:
install:
modprobe wakeup_counter
modprobe thread_module
Enhancing the answer posted by #cm161 for future users to highlight exact steps which worked for me
With below Makefile use following steps
Step 1: make ( type just make command) - for creation of modules i.e. .ko files and associated files
Step 2: make install
Step 3 : now do lsmod you should be able to see new modules
obj-m := wakeup_counter.o
obj-m += thread_module.o
KDIR = /lib/modules/2.6.32-5-amd64/build
all:
make -C $(KDIR) M=$(PWD) modules
cp wakeup_counter.ko /lib/modules/2.6.32-5-amd64/
cp thread_module.ko /lib/modules/2.6.32-5-amd64/
install:
modprobe wakeup_counter
modprobe thread_module
clean:
make -C $(KDIR) M=$(PWD) clean
I am trying to link Lapack library with my Makefile and Fortran 90 code (gfortran), but every time I type : make pkr_test (pkr_test is the name of the code)
I get the following error :
make[1]: * No rule to make target '/usr/ben/models/common/src/fitting.o'. Stop.
make[1]: Leaving directory '/usr/ben/models/common/src'
Makefile:20: recipe for target '/usr/ben/models/common/src/fitting.o' failed
make: * [/usr/ben/models/common/src/fitting.o] Error 2
I can attach the Makefile and the Makefile. In case it will help you to give me a quick solution. I actually tried to attach it but I didn't manage.
Here is the Makefile:
#
# Makefile for pqr_test
#
include ../../Makefile.in
#
MODS= $(DIR_test)wrt_two.o \
$(DIR_test)ppt_one.o \
$(DIR_test)cat_one.o \
$(DIR_test)uti_test.o \
$(DIR_test)ncdf_test.o \
$(DIR_test)quick_test.o \
$(DIR_test)ovr_one.o \
$(DIR_test)row_to.o \
$(DIR_test)fitting.o
#
OBJS=pqr_test.o
#
$(MODS) :
cd $(DIR_test) && make $(MODS)
#
pqr_test : $(MODS) $(OBJS)
cd $(DIR_test) && make $(MODS)
$(FC) $(FFLAGS) -L$(XML_LIB) -L$(NC_LIB_LOC) -L$(NC_LIB_LAPACK_LOC) -I$(NC_INCLUDE) -I$(NC_LAPACK_INCLUDE) \
-Wl,-rpath,$(NC_LIB_LOC) $(NC_LIB_LAPACK_LOC) $(MODS) $(OBJS) $(NC_LIB) $(NC_LIB_LAPACK) \
-lflib -o ../bin/pqr_test
#
pqr_test.o : pqr_test.f90
cd $(DIR_test) && make $(MODS)
$(FC) $(FFLAGS) -I$(DIR_test) -I$(XML_INCLUDE) -I$(NC_INCLUDE) -I$(NC_LAPACK_INCLUDE) -c pqr_test.f90
#
cleanup:
mv $(DIR_test)*.o $(DIR_test)../obj/
mv $(DIR_test)*.mod $(DIR_test)../mod/
mv *.o ../obj/
#
clean:
rm -f $(DIR_test)*.o
rm -f $(DIR_test)../obj/*.o
rm -f $(DIR_test)*.mod
rm -f $(DIR_test)../obj/*.o
rm -f *.o
rm -f ../obj/*.o
#
I am trying to link Lapack library with my Makefile and Fortran 90 code (gfortran), but every time I type : make pkr_test (pkr_test is the name of the code) I get the following error :
make[1]: * No rule to make target '/usr/ben/models/common/src/fitting.o'. Stop.
make[1]: Leaving directory '/usr/ben/models/common/src'
Makefile:20: recipe for target '/usr/ben/models/common/src/fitting.o' failed
make: * [/usr/ben/models/common/src/fitting.o] Error 2
The Makefile tries to build the (object) modules specified in MODS variable, including the last one, $(DIR_test)fitting.o.
It does this by doing the equivalent of calling itself, make $(DIR_test)fitting.o. The problem is that your Makefile, and the included Makefile (../../Makefile.in) don't include instructions on how to generate that file, and the implicit make rules don't success either.
As the dependency ($(DIR_test)fitting.o) cannot be built, make cannot build your specified target (pkr_test).
I have a working make, I have platform code and like several makes for each os in the folder. Right now I have one makefile which works. I renamed it to Makefile.ws and wrote this in Makefile
all:
make -f Makefile.w32
clean:
make -f Makefile.w32 clean
I ran it and got this error
> "make"
make -f Makefile.w32
make[1]: Entering directory `/c/nightly/test'
make -f Makefile.w32
make[3]: Makefile.w32: No such file or directory
make[3]: *** No rule to make target `Makefile.w32'. Stop.
make[2]: *** [all] Error 2
make[1]: *** [build] Error 2
make[1]: Leaving directory `/c/nightly/test'
"make": *** [all] Error 2
Oddly enough the clean works perfectly. Then I decided to write "make -f Makefile.w32 mingw32" and that did not work correctly. In fact it made a folder called mingw32 which I thought was very strange.
As for the mingw32 rule I just copy build which I suspect is the main/normal rule that is used to build
$(BUILD):
#[ -d $# ] || mkdir -p $#
#make --no-print-directory -C $(BUILD) -f $(CURDIR)/Makefile
mingw32:
#[ -d $# ] || mkdir -p $#
#make --no-print-directory -C $(BUILD) -f $(CURDIR)/Makefile
full .w32 source is here http://pastie.org/320035
First, what make are you running? Cygwin or MinGW, or something else?
make -f Makefile.w32
make[1]: Entering directory `/c/nightly/test'
make -f Makefile.w32
make[3]: Makefile.w32: No such file or directory
"Entering directory" is a hint. Why is it entering /c/nightly/test? Is there a Makefile.w32 there?
As to creating the directory "mingw32", the rule
mingw32:
#[ -d $# ] || mkdir -p $#
...
does exactly that. If "mingw32" does not exist, it creates it.
It would be easier to help you if you had a shorter example and clearly explain what you want to accomplish and what you expect to happen.
I think I see the problem in your second example. The mingw32 line should be changed so that it does not include the $(BUILD) variable:
mingw32:
#[ -d $# ] || mkdir -p $#
#make --no-print-directory -C mingw32 -f $(CURDIR)/Makefile
It is clear that he created the directory,
your first command in your given 2 rules, include a mkdir with the object name, i.e. either build or mingw32
Afterwards he changes into the current directory (i.e. no cd at all) and execute Makefile. But as you wrote you renamed Makefile into Makefile.ws, so offcourse you are getting File-Not-Found-error.
From the questions I can only recommend you to have a look at an short introduction or even better the manual for make.
Have you tried calling the secondary makefile using
$(MAKE) -f ...
instead of
make -f ...?