This question already has answers here:
Is it possible to set CFLAGS to a linux kernel module Makefile?
(2 answers)
Closed 2 years ago.
I try to compile my code with c11 mode.
Here is my make file:
obj-m := message_slot.o
KDIR := /lib/modules/$(shell uname -r)/build
PWD := $(shell pwd)
CFLAGS=-g -std=c11 -Wall -pedantic
all:
$(MAKE) -C $(KDIR) M=$(PWD) modules
clean:
$(MAKE) -C $(KDIR) M=$(PWD) clean
for some reason during compilation, the compiler still try to compile the code with c90. Does anyone understand why?
/home/eran/CLionProjects/tau_os_ex3/message_slot.c:29:5: warning: ISO C90 forbids mixed declarations and code [-Wdeclaration-after-statement]
CXXFLAGS conveys build flags for C++, but the error message indicates that you are trying to build a C source. C compiler flags go in CFLAGS.
Related
I'm trying to cross compile a helloworld kernel (2.6.x) module for ARM architecture on my intel x86 host.
The codesourcery tool chain for ARM is located at: /home/ravi/workspace/hawk/arm-2009q3
The kernel source is located at :/home/ravi/workspace/hawk/linux-omapl1
My Makefile:
ARCH=arm
CROSS_COMPILE=arm-none-linux-gnueabi
obj-m := Hello.o
KDIR := /home/ravi/workspace/hawk/linux-omapl1
PWD := $(shell pwd)
default:
$(MAKE) -C $(KDIR) SUBDIRS=$(PWD) modules
clean:
$(MAKE) -C $(KDIR) SUBDIRS=$(PWD) clean
When i run make, the .ko produced is that of my host machine which means the makefile is invoking the native compiler instead of the cross compiler.What am I doing wrong? The cross compiler's binaries are in my path.
Putting ARCH and CROSS_COMPILE in the Makefile doesn't work. You need to put them on the command line:
make ARCH=arm CROSS_COMPILE=arm-none-linux-gnueabi-
Replace
ARCH=arm
CROSS_COMPILE=arm-none-linux-gnueabi
by
export ARCH:=arm
export CROSS_COMPILE:=arm-none-linux-gnueabi-
this will also work if you do not want to give these parameter command line each time.
Sidenote: SUBDIRS= is deprecated in favor of M=.
could you try, you forgot to add ARCH and CROSS_COMPILE into the default and clean
ARCH=arm
COMPILER=arm-none-linux-gnueabi
obj-m := Hello.o
KERNELDIR := /home/ravi/workspace/hawk/linux-omapl1
PWD := $(shell pwd)
default:
$(MAKE) -C $(KERNELDIR) M=$(PWD) ARCH=$(ARCH) CROSS_COMPILE=$(COMPILER) modules
clean:
$(MAKE) -C $(KERNELDIR) M=$(PWD) ARCH=$(ARCH) clean
adding export at the end of your Makefile variable declarations will make them available to subshells. and add the dash to the CROSS_COMPILE prefix as JayM pointed out, and M instead of SUBDIRS as user502515 answered.
and it's generally a good idea to use := rather than = in a Makefile, so the variable only gets interpolated once. really doesn't matter in this particular case though.
ARCH := arm
CROSS_COMPILE := arm-none-linux-gnueabi-
obj-m := Hello.o
KDIR := /home/ravi/workspace/hawk/linux-omapl1
PWD := $(shell pwd)
export
default:
$(MAKE) -C $(KDIR) M=$(PWD) modules
clean:
$(MAKE) -C $(KDIR) M=$(PWD) clean
MODULES := hola_kern.o
#guest architecture
ARCH := arm
CROSS_COMPILE := arm-linux-gnueabi-
obj-m := $(MODULES)
#path of the arm compiled kernel
ROOTDIR := /home/aldo/c/proyectos/prefixa/work/kernels/linux-omap-5f0a6e2
MAKEARCH := $(MAKE) ARCH=$(ARCH) CROSS_COMPILE=$(CROSS_COMPILE)
all: modules
modules:
$(MAKEARCH) -C $(ROOTDIR) M=${shell pwd} modules
clean:
$(MAKEARCH) -C $(ROOTDIR) M=${shell pwd} clean
I have Makefile:
INC=-I/usr/lib/boost_1_61_0
PYTHON_VERSION = 2.7
PYTHON_INCLUDE = /usr/include/python$(PYTHON_VERSION)
# location of the Boost Python include files and library
MINIREADER_INC = ./../../hdr
BOOST_INC = /usr/lib/boost_1_61_0
BOOST_LIB = /usr/lib/boost_1_61_0/stage/lib
TARGET = LoggerTestModule
$(TARGET).o: $(TARGET).cpp
g++ -I$(PYTHON_INCLUDE) -I$(BOOST_INC) -I$(MINIREADER_INC) -fPIC -c $(TARGET).cpp --std=c++14 -g3
$(TARGET).so: $(TARGET).o
g++ -shared -Wl,--export-dynamic $(TARGET).o ../../Release/src/Logger.o -L$(BOOST_LIB) -lboost_python -L/usr/lib/python$(PYTHON_VERSION)/config -lpython$(PYTHON_VERSION) -o $(TARGET).so --std=c++11 -g3
When running make -f Makefile only object file gets generated, how I can change makefile to generate both "object and library file"?
Thanks
Add a phony target and put it before the others such that it is the default goal:
...
TARGET = LoggerTestModule
.PHONY: all
all: $(TARGET).o $(TARGET).so
$(TARGET).o: $(TARGET).cpp
g++ -I$(PYTHON_INCLUDE) -I$(BOOST_INC) -I$(MINIREADER_INC) -fPIC -c $(TARGET).cpp --std=c++14 -g3
...
Explanations: all is the default goal (first non-special target in Makefile) and depends on $(TARGET).o $(TARGET).so. So, we invoking make without specifying a goal, it is all that will be built and all its pre-requisites will be rebuilt if needed. Declaring it as a pre-requisite of the .PHONY special target tells make to rebuild it, even if, by accident, a file named all exists.
Get rid of the rule for the object file, make already knows how to build it. You should probably also restructure your vars to align them with the built-in rule for linking, which you can then recycle
TARGET := LoggerTestModule
PYTHON_VERSION := 2.7
PYTHON_INCLUDE := /usr/include/python$(PYTHON_VERSION)
MINIREADER_INC := ./../../hdr
BOOST_INC := /usr/lib/boost_1_61_0
BOOST_LIB := /usr/lib/boost_1_61_0/stage/lib
CPPFLAGS := -I$(PYTHON_INCLUDE) -I$(MINIREADER_INC) -I$(BOOST_INC)
CXXFLAGS := -fPIC -std=c++14 -g3
LDFLAGS := -L$(BOOST_LIB) -L/usr/lib/python$(PYTHON_VERSION)/config
LDLIBS := -lboost_python -lpython$(PYTHON_VERSION)
$(TARGET).so: CC := $(CXX)
$(TARGET).so: LDFLAGS += -shared -Wl,--export-dynamic
$(TARGET).so: $(TARGET).o ../../Release/src/Logger.o
$(LINK.o) $^ $(LDLIBS) -o $#
Just to learn, I try to compile an old device driver example on Ubuntu 14, and I get a warning.
I guess this warning is triggered because some inconsistency between the type returned from __WORK_INITIALIZER and the work_struct structure. What I don't understand is how that can happen. :)
This happens at row 19 in my file shortprint.c, at an include line that includes module.h according to the call stack shown below. So I guess that my code is irrelevant, this seems to be inside the linux include files. Am I right?
I'm running Ubuntu 14.04.
fredrik#fredrik-VirtualBox:~/Documents/lab8_3/shortprint$ make
make -C /lib/modules/3.13.0-45-generic/build M=/home/fredrik/Documents/lab8_3/shortprint modules
make[1]: Entering directory `/usr/src/linux-headers-3.13.0-45-generic'
CC [M] /home/fredrik/Documents/lab8_3/shortprint/shortprint.o
In file included from include/linux/srcu.h:34:0,
from include/linux/notifier.h:15,
from include/linux/memory_hotplug.h:6,
from include/linux/mmzone.h:801,
from include/linux/gfp.h:4,
from include/linux/kmod.h:22,
from include/linux/module.h:13,
from /home/fredrik/Documents/lab8_3/shortprint/shortprint.c:19:
include/linux/workqueue.h:172:9: warning: initialization from incompatible pointer type [enabled by default]
struct work_struct n = __WORK_INITIALIZER(n, f)
FWIW I also include my makefile:
# Comment/uncomment the following line to disable/enable debugging
#DEBUG = y
EXTRA_CFLAGS += -O2 -I..
ifneq ($(KERNELRELEASE),)
# call from kernel build system
obj-m := shortprint.o
else
KERNELDIR ?= /lib/modules/$(shell uname -r)/build
PWD := $(shell pwd)
default:
$(MAKE) -C $(KERNELDIR) M=$(PWD) modules
endif
clean:
rm -rf *.o *~ core .depend .*.cmd *.ko *.mod.c .tmp_versions
depend .depend dep:
$(CC) $(CFLAGS) -M *.c > .depend
ifeq (.depend,$(wildcard .depend))
include .depend
endif
The corrected code. The function was of void short_do_work(void*) before the correction:
static void shortp_do_work(struct work_struct *work);
static DECLARE_WORK(shortp_work, shortp_do_work);
Your code is certainly relevant. The entire kernel uses these macros and somehow works, so I'd suspect the problem is in the way you call them. It would be an incompatible function pointer type passed to __WORK_INITIALIZER().
By the way, please use DECLARE_WORK() or INIT_WORK() if possible.
The function prototype for workers is
typedef void (*work_func_t)(struct work_struct *work);
Defined in include/linux/workqueue.h
Eg: a common device module's Makefile
obj-m:=jc.o
default:
$(MAKE) -C /lib/modules/$(shell uname -r)/build M=$(shell pwd) modules
clean:
$(MAKE) -C /lib/modules/$(shell uname -r)/build M=$(shell pwd) modules clean
I consider if I can set CFLAGS to the file. When I change default section to
$(MAKE) -O2 -C /lib/modules/$(shell uname -r)/build M=$(shell pwd) modules
But it didn't work.
Any help? Thanks a lot.
-O2 would be an option to make (or $(MAKE), as you're using it) in what you tried. Obviously, the compiler (probably gcc) needs this flag, not make.
Kbuild understands a make variable named CFLAGS_modulename.o to add specific C flags when compiling this unit. In your case, your module object will be jc.o, so you can specify:
CFLAGS_jc.o := -O2
and it should work. Add V=1 to your $(MAKE) lines to get a verbose output and you should see -O2 when jc.c is being compiled.
You can find more about compiling modules in the official documentation.
You can also use
ccflags-y := -O2
This will be applied to all of the source files compiled for your module with the Makefile. This is indirectly documented in the link provided by eepp in Section 4.2
I'm trying to cross compile a helloworld kernel (2.6.x) module for ARM architecture on my intel x86 host.
The codesourcery tool chain for ARM is located at: /home/ravi/workspace/hawk/arm-2009q3
The kernel source is located at :/home/ravi/workspace/hawk/linux-omapl1
My Makefile:
ARCH=arm
CROSS_COMPILE=arm-none-linux-gnueabi
obj-m := Hello.o
KDIR := /home/ravi/workspace/hawk/linux-omapl1
PWD := $(shell pwd)
default:
$(MAKE) -C $(KDIR) SUBDIRS=$(PWD) modules
clean:
$(MAKE) -C $(KDIR) SUBDIRS=$(PWD) clean
When i run make, the .ko produced is that of my host machine which means the makefile is invoking the native compiler instead of the cross compiler.What am I doing wrong? The cross compiler's binaries are in my path.
Putting ARCH and CROSS_COMPILE in the Makefile doesn't work. You need to put them on the command line:
make ARCH=arm CROSS_COMPILE=arm-none-linux-gnueabi-
Replace
ARCH=arm
CROSS_COMPILE=arm-none-linux-gnueabi
by
export ARCH:=arm
export CROSS_COMPILE:=arm-none-linux-gnueabi-
this will also work if you do not want to give these parameter command line each time.
Sidenote: SUBDIRS= is deprecated in favor of M=.
could you try, you forgot to add ARCH and CROSS_COMPILE into the default and clean
ARCH=arm
COMPILER=arm-none-linux-gnueabi
obj-m := Hello.o
KERNELDIR := /home/ravi/workspace/hawk/linux-omapl1
PWD := $(shell pwd)
default:
$(MAKE) -C $(KERNELDIR) M=$(PWD) ARCH=$(ARCH) CROSS_COMPILE=$(COMPILER) modules
clean:
$(MAKE) -C $(KERNELDIR) M=$(PWD) ARCH=$(ARCH) clean
adding export at the end of your Makefile variable declarations will make them available to subshells. and add the dash to the CROSS_COMPILE prefix as JayM pointed out, and M instead of SUBDIRS as user502515 answered.
and it's generally a good idea to use := rather than = in a Makefile, so the variable only gets interpolated once. really doesn't matter in this particular case though.
ARCH := arm
CROSS_COMPILE := arm-none-linux-gnueabi-
obj-m := Hello.o
KDIR := /home/ravi/workspace/hawk/linux-omapl1
PWD := $(shell pwd)
export
default:
$(MAKE) -C $(KDIR) M=$(PWD) modules
clean:
$(MAKE) -C $(KDIR) M=$(PWD) clean
MODULES := hola_kern.o
#guest architecture
ARCH := arm
CROSS_COMPILE := arm-linux-gnueabi-
obj-m := $(MODULES)
#path of the arm compiled kernel
ROOTDIR := /home/aldo/c/proyectos/prefixa/work/kernels/linux-omap-5f0a6e2
MAKEARCH := $(MAKE) ARCH=$(ARCH) CROSS_COMPILE=$(CROSS_COMPILE)
all: modules
modules:
$(MAKEARCH) -C $(ROOTDIR) M=${shell pwd} modules
clean:
$(MAKEARCH) -C $(ROOTDIR) M=${shell pwd} clean