cross compiling kernel module Yocto SDK, errors from missing headers included in other kernel headers - makefile

Trying to compile a kernel module with the Yocto SDK toolchain. Using CMakeLists inside CLion with ExternalProject_Add directive.
Makefile:
# Makefile for uio48
ifneq ($(KERNELRELEASE),) # called by kbuild
obj-m := uio48.o
else # called from command line
KERNEL_VERSION = `uname -r`
KERNELDIR := /lib/modules/$(KERNEL_VERSION)/build
PWD := $(shell pwd)
MODULE_INSTALLDIR = /lib/modules/$(KERNEL_VERSION)/kernel/drivers/gpio/
default:
$(MAKE) -C $(KERNELDIR) M=$(PWD) modules
uio48io.o: uio48io.c uio48.h Makefile
#gcc -c $(EXTRA_CFLAGS) uio48io.c
$(CC) -c $(EXTRA_CFLAGS) uio48io.c
libuio48io.a: uio48io.o
ar rcs libuio48io.a uio48io.o
libs: libuio48io.a
all: default libs
install:
#mkdir -p ${PREFIX}/$(MODULE_INSTALLDIR)
#rm -f $(MODULE_INSTALLDIR)uio48.ko
#install -c -m 0644 ${PREFIX}/lib/modules/${KERNEL_VERSION}/extra/uio48.ko ${PREFIX}/$(MODULE_INSTALLDIR)
#install -m 0755 ${PREFIX}flash ${D}${bindir}
#/sbin/depmod -a
uninstall:
rm -f $(MODULE_INSTALLDIR)uio48.ko
/sbin/depmod -a
flash: flash.c uio48.h uio48io.o Makefile
#gcc -static flash.c uio48io.o -o flash
$(CC) flash.c uio48io.o -o flash
chmod a+x flash
diotest: diosetpintest.c uio48.h uio48io.o Makefile
#gcc -static flash.c uio48io.o -o flash
${CC} diosetpintest.c uio48io.o -o diotest
chmod a+x diotest
poll: poll.c uio48.h uio48io.o Makefile
#gcc -D_REENTRANT -static poll.c uio48io.o -o poll -lpthread
${CC} -D_REENTRANT -static poll.c uio48io.o -o poll -lpthread
chmod a+x poll
endif
clean:
rm -rf *.o *~ core .depend .*.cmd *.ko *.mod.c .tmp_versions /dev/uio48?
spotless:
rm -rf ioctl poll flash Module.* *.o *~ core .depend .*.cmd *.ko *.mod.c *.order .tmp_versions /dev/uio48?
As you can see I've already modified the make file provided by the vendor. I replaced some build lines with $(CC) to make sure it uses the toolchain compiler. Commented out the Install section because I couldn't figure out how to stop CMake ExternalProject from running the install command; just want to build it.
CMakeLists.txt:
project(driver)
cmake_minimum_required(VERSION 3.17)
enable_language(C ASM CXX)
set(CMAKE_CXX_STANDARD 11)
set(SHARED_LIBRARY_ROOT "$ENV{OECORE_TARGET_SYSROOT}/usr/lib")
set(SHARED_LIBRARY_INCLUDE "$ENV{OECORE_TARGET_SYSROOT}/usr/include")
set(CMAKE_FIND_ROOT_PATH $ENV{OECORE_TARGET_SYSROOT} $ENV{OECORE_NATIVE_SYSROOT} )
set(TARGET_PLATFORM_INCLUDE "$ENV{OECORE_TARGET_SYSROOT}/usr/src/kernel/include/linux")
set(TARGET_KERNEL_DIR "$ENV{OECORE_TARGET_SYSROOT}/usr/src/kernel")
set(TP_INCLUDE_CFLAG "-I${TARGET_PLATFORM_INCLUDE} -I${SHARED_LIBRARY_INCLUDE}")
MESSAGE(STATUS "CMAKE_FIND_ROOT_PATH ${CMAKE_FIND_ROOT_PATH}")
MESSAGE(STATUS "TARGET_PLATFORM_INCLUDE ${TARGET_PLATFORM_INCLUDE}")
MESSAGE(STATUS "CMake C compiler ${CMAKE_C_COMPILER}")
include_directories(${CMAKE_CURRENT_LIST_DIR})
include_directories(${SHARED_LIBRARY_ROOT})
include_directories(${SHARED_LIBRARY_INCLUDE})
include(ExternalProject)
ExternalProject_Add(
uio48
UPDATE_COMMAND ""
PATCH_COMMAND ""
CONFIGURE_COMMAND ""
BUILD_COMMAND make all CC=${CMAKE_C_COMPILER} KERNEL_DIR=${TARGET_KERNEL_DIR} EXTRA_CFLAGS=${TP_INCLUDE_CFLAG}
SOURCE_DIR ${CMAKE_CURRENT_LIST_DIR}
BUILD_IN_SOURCE 1
BUILD_ALWAYS 1)
If I leave The Makefile the way it is, I can see from the output I am changing directory to my host kernel source.
partial output:
make[5]: Entering directory `/usr/src/kernels/3.10.0-957.el7.x86_64'
Building modules, stage 2.
MODPOST 1 modules
make[5]: Leaving directory `/usr/src/kernels/3.10.0-957.el7.x86_64'
so I modified these lines in the make file:
#ifneq ($(KERNELRELEASE),) # called by kbuild
# obj-m := uio48.o
#else # called from command line
KERNEL_VERSION = `uname -r`
KERNELDIR := /lib/modules/$(KERNEL_VERSION)/build
PWD := $(shell pwd)
MODULE_INSTALLDIR = /lib/modules/$(KERNEL_VERSION)/kernel/drivers/gpio/
When I do this, I change directory into my kernel source in the toolchain as the output shows, however...:
ake[5]: Entering directory `/opt/poky-sdk/2.4.2/sysroots/corei7-64-poky-linux/usr/src/kernel'
Building modules, stage 2.
MODPOST 0 modules
make[5]: Leaving directory `/opt/poky-sdk/2.4.2/sysroots/corei7-64-poky-linux/usr/src/kernel'
#gcc -c -I/opt/poky-sdk/2.4.2/sysroots/corei7-64-poky-linux/usr/src/kernel/include/linux -I/opt/poky-sdk/2.4.2/sysroots/corei7-64-poky-linux/usr/include uio48io.c
/opt/poky-sdk/2.4.2/sysroots/x86_64-pokysdk-linux/usr/bin/x86_64-poky-linux/x86_64-poky-linux-gcc -c -I/opt/poky-sdk/2.4.2/sysroots/corei7-64-poky-linux/usr/src/kernel/include/linux -I/opt/poky-sdk/2.4.2/sysroots/corei7-64-poky-linux/usr/include uio48io.c
In file included from /opt/poky-sdk/2.4.2/sysroots/corei7-64-poky-linux/usr/include/stdio.h:33:0,
from uio48io.c:35:
/opt/poky-sdk/2.4.2/sysroots/corei7-64-poky-linux/usr/src/kernel/include/linux/stddef.h:4:10: fatal error: uapi/linux/stddef.h: No such file or directory
#include <uapi/linux/stddef.h>
^~~~~~~~~~~~~~~~~~~~~
compilation terminated.
now i'm getting an error for a missing header file that is an include from another Linux kernel header file.
After searching for the 'uapi', it shows up under different architectures in the source; ./usr/src/kernel/tools/arch/powerpc/include/uapi for example. so, Im guessing i need to specify the arch in order for it to include the right header but I'm not having any luck.
I tried adding: -march=x86-64 here:
set(TP_INCLUDE_CFLAG "-I${TARGET_PLATFORM_INCLUDE} -I${SHARED_LIBRARY_INCLUDE} -march=x86-64")
.
.
.
BUILD_COMMAND make all CC=${CMAKE_C_COMPILER} KERNELDIR=${TARGET_KERNEL_DIR} EXTRA_CFLAGS=${TP_INCLUDE_CFLAG}
but that didn't seem to work. Any ideas?
UPDATE
if I include the 'uapi' directory, it solves one problem and spawns another. Now I'm getting errors from the linux header files themselves...
example:
set(TARGET_KERNEL_DIR "$ENV{OECORE_TARGET_SYSROOT}/usr/src/kernel")
set(TARGET_PLATFORM_INCLUDE "$ENV{OECORE_TARGET_SYSROOT}/usr/src/kernel/include/linux")
set(TARGET_ARCH_DIR_INCLUDE "$ENV{OECORE_TARGET_SYSROOT}/usr/src/kernel/include/uapi/linux/")
set(USER_INCLUDE "$ENV{OECORE_TARGET_SYSROOT}/usr/include")
set(TP_INCLUDE_CFLAG "-I${TARGET_ARCH_DIR_INCLUDE} -I${TARGET_PLATFORM_INCLUDE} -I${USER_INCLUDE}")
.
.
.
BUILD_COMMAND make all CC=${CMAKE_C_COMPILER} KERNELDIR=${TARGET_KERNEL_DIR} EXTRA_CFLAGS=${TP_INCLUDE_CFLAG}
one of these errors for example:
n file included from /opt/poky-sdk/2.4.2/sysroots/corei7-64-poky-linux/usr/include/stdio.h:41:0,
from uio48io.c:35:
/opt/poky-sdk/2.4.2/sysroots/corei7-64-poky-linux/usr/include/libio.h:302:3: error: unknown type name ‘size_t’
size_t __pad5;
^~~~~~

Related

GCC ERROR: Cannot Execute Binary File [GCC Compiled from Source]

I am writing an Operating System. I am currently stuck at not being able to compile C code into output files, then further linking them with ld
When I run my make file, this error pops up:
/usr/local/i386elfgcc/bin/i386-elf-gcc -g -ffreestanding -c kernel/kernel.c -o kernel/kernel.o
/usr/local/i386elfgcc/bin/i386-elf-gcc: /usr/local/i386elfgcc/bin/i386-elf-gcc: cannot execute binary file
make: *** [kernel/kernel.o] Error 126
This is the makefile
C_SOURCES = $(wildcard kernel/*.c drivers/*.c)
HEADERS = $(wildcard kernel/*.h drivers/*.h)
# Nice syntax for file extension replacement
OBJ = ${C_SOURCES:.c=.o}
# Change this if your cross-compiler is somewhere else
CC = /usr/local/i386elfgcc/bin/i386-elf-gcc
GDB = /usr/local/i386elfgcc/bin/i386-elf-gdb
LD = /usr/local/i386elfgcc/bin/i386-elf-ld
# -g: Use debugging symbols in gcc
CFLAGS = -g
# First rule is run by default
os-image.bin: boot/boot.bin kernel.bin
cat $^ > os-image.bin
# '--oformat binary' deletes all symbols as a collateral, so we don't need
# to 'strip' them manually on this case
kernel.bin: boot/kernelStart32.o ${OBJ}
${LD} -o $# -Ttext 0x1000 $^ --oformat binary
# Used for debugging purposes
kernel.elf: boot/boot_32bit_kernel_entry.o ${OBJ}
${LD} -o $# -Ttext 0x1000 $^
run: os-image.bin
qemu-system-i386 -fda os-image.bin
# Open the connection to qemu and load our kernel-object file with symbols
debug: os-image.bin kernel.elf
qemu-system-i386 -s -fda os-image.bin &
${GDB} -ex "target remote localhost:1234" -ex "symbol-file kernel.elf"
# Generic rules for wildcards
# To make an object, always compile from its .c
%.o: %.c ${HEADERS}
${CC} ${CFLAGS} -ffreestanding -c $< -o $#
%.o: %.asm
nasm $< -f elf -o $#
%.bin: %.asm
nasm $< -f bin -o $#
clean:
rm -rf *.bin *.dis *.o os-image.bin *.elf
rm -rf kernel/*.o boot/*.bin drivers/*.o boot/*.o
I have built GCC etc to the path: /usr/local/i386-elf-gcc
I am on macOS Monterey 12.4 (Intel - x86_64) and have all dependencies installed
I have tried looking everywhere for this problem, trying different flags and everything, however the problem still persisted
It means that the compiler you built doesn't run on the system you are running it on. You have to decide whether you want to do native compiling in which case you would build a compiler that runs on the target and also generates output for the target. This is how the compilers you usually use always work.
If you create that kind of compiler then you have to run make on the target since that's where you build the compiler to run.
Or, you can create a cross-compiler. A cross-compiler runs on your local system, but builds output that runs on the target system.
In your case, if you want to compile code on your MacOS system but generate binary files that run on a different system, you need a cross-compiler.

Convert Makefile into CMakeLists, where to start

I searched on the inet but I did not find any clear answer. Could you point me in the right direction on how to convert a Makefile into a CMakeLists?
I want to do that because I am new both to makefile and to cmake. In my job CMake is more used and since I need to start using one of them I prefer having everything in CMake. I know CMake is generating a Makefile but for me CMake is way easier to read than a Makefile.
I have the following Makefile:
PREFIX ?= /usr/local
CC = gcc
AR = ar
CFLAGS = -std=gnu99 -fPIC -Wall -Wno-unused-parameter -Wno-unused-function -I. -O4
APRILTAG_SRCS := $(shell ls *.c common/*.c)
APRILTAG_HEADERS := $(shell ls *.h common/*.h)
APRILTAG_OBJS := $(APRILTAG_SRCS:%.c=%.o)
TARGETS := libapriltag.a libapriltag.so
# LIBS := -Lusr/include/flycapture
.PHONY: all
all: $(TARGETS)
#$(MAKE) -C example all
.PHONY: install
install: libapriltag.so
#chmod +x install.sh
#./install.sh $(PREFIX)/lib libapriltag.so #this should be the line that install the library
#./install.sh $(PREFIX)/include/apriltag $(APRILTAG_HEADERS)
#sed 's:^prefix=$$:prefix=$(PREFIX):' < apriltag.pc.in > apriltag.pc
#./install.sh $(PREFIX)/lib/pkgconfig apriltag.pc
#rm apriltag.pc
#ldconfig
libapriltag.a: $(APRILTAG_OBJS)
#echo " [$#]"
#$(AR) -cq $# $(APRILTAG_OBJS)
libapriltag.so: $(APRILTAG_OBJS)
#echo " [$#]"
#$(CC) -fPIC -shared -o $# $^
%.o: %.c
#echo " $#"
#$(CC) -o $# -c $< $(CFLAGS)
.PHONY: clean
clean:
#rm -rf *.o common/*.o $(TARGETS)
#$(MAKE) -C example clean
I am not asking you to do my job but I would like to have some kind of guide or a good link where to look.
The project contains both C and C++ programming languages.
I started creating a new CMakeLists.txt file, but it is still not working. It gives me the following errors:
You have called ADD_LIBRARY for library librapriltag.a without any source files. This typically indicates a problem with your CMakeLists.txt file
-- Configuring done
CMake Error: Cannot determine link language for target "librapriltag.a".
CMake Error: CMake can not determine linker language for target: librapriltag.a
-- Generating done
-- Build files have been written to: .....
The CMakeLists.txt I started creating is the following:
project( apriltag2 C CXX)
cmake_minimum_required(VERSION 2.8)
set(CMAKE_C_FLAGS "-std=gnu99 -fPIC -Wall -Wno-unused-parameter -Wno-unused-function -I. -O4")
include_directories("/home/fschiano/Repositories/apriltag2")
include_directories("/home/fschiano/Repositories/apriltag2/common")
add_library( librapriltag.a )
The CMakeLists.txt which works is the following:
project( apriltag2 )
cmake_minimum_required(VERSION 2.8)
set(CMAKE_C_FLAGS "-std=gnu99 -fPIC -Wall -Wno-unused-parameter -Wno-unused-function -I. -O4")
message("CMAKE_SOURCE_DIR=${CMAKE_SOURCE_DIR}")
file(GLOB apriltag_SRC "*.c")
file(GLOB apriltag_HEADERS "*.h")
set(APRILTAG_SRCS ${apriltag_SRC})
set(APRILTAG_HEADERS ${apriltag_HEADERS})
message(STATUS "CMAKE_CURRENT_LIST_DIR=${CMAKE_CURRENT_LIST_DIR}")
add_library(apriltag STATIC ${APRILTAG_SRCS})
target_include_directories(apriltag PUBLIC ${CMAKE_SOURCE_DIR})
target_compile_options(apriltag PUBLIC -fPIC -Wall -Wno-unused-parameter -Wno-unused-function -O4)
install(TARGETS apriltag
ARCHIVE DESTINATION lib
RUNTIME DESTINATION bin
LIBRARY DESTINATION lib)
install(DIRECTORY CMAKE_CURRENT_LIST_DIR/include/
DESTINATION CMAKE_CURRENT_LIST_DIR/include/
FILES_MATCHING PATTERN *.h)
EDIT:
Something is still not right. If I want to change something in my library, like something which is in /home/fschiano/Repositories/apriltag2/common
If I use the Makefile which I had before doing all these modifications and I do:
make
do some modifications in the files I wanted to modify
sudo make install, which would give me the following output:
/usr/local/lib/libapriltag.so
/usr/local/include/apriltag/apriltag.h
/usr/local/include/apriltag/common/g2d.h
/usr/local/include/apriltag/common/getopt.h
/usr/local/include/apriltag/common/homography.h
/usr/local/include/apriltag/common/image_f32.h
/usr/local/include/apriltag/common/image_u8.h
/usr/local/include/apriltag/common/image_u8x3.h
/usr/local/include/apriltag/common/matd.h
/usr/local/include/apriltag/common/math_util.h
/usr/local/include/apriltag/common/pnm.h
/usr/local/include/apriltag/common/postscript_utils.h
/usr/local/include/apriltag/common/string_util.h
/usr/local/include/apriltag/common/svd22.h
/usr/local/include/apriltag/common/thash_impl.h
/usr/local/include/apriltag/common/timeprofile.h
/usr/local/include/apriltag/common/time_util.h
/usr/local/include/apriltag/common/unionfind.h
/usr/local/include/apriltag/common/workerpool.h
/usr/local/include/apriltag/common/zarray.h
/usr/local/include/apriltag/common/zhash.h
/usr/local/include/apriltag/common/zmaxheap.h
/usr/local/include/apriltag/tag16h5.h
/usr/local/include/apriltag/tag25h7.h
/usr/local/include/apriltag/tag25h9.h
/usr/local/include/apriltag/tag36artoolkit.h
/usr/local/include/apriltag/tag36h10.h
/usr/local/include/apriltag/tag36h11.h
/usr/local/lib/pkgconfig/apriltag.pc
/sbin/ldconfig.real: /usr/lib/libstdc++.so.5 is not a symbolic link
and the modifications would take effect.
Now, if I remove the Makefile and I do:
cmake .
make
do some modifications in the files I wanted to modify
sudo make install, it gives me the following output:
Install the project...
-- Install configuration: ""
-- Up-to-date: /usr/local/lib/libapriltag.a
So it seems that the install part of the CMakeLists.txt is not right!
The file install.sh is the following.
#!/bin/sh -e
# Usage: install.sh TARGET [RELATIVE PATHS ...]
#
# e.g. ./install.sh /usr/local foo/file1 foo/file2 ...
# This creates the files /usr/local/foo/file1 and /usr/local/foo/file2
TARGETDIR=$1
shift
for src in "$#"; do
dest=$TARGETDIR/$src
mkdir -p $(dirname $dest)
cp $src $dest
echo $dest
done
Could you try to help me?
Thanks
Let's go through that step-by-step:
PREFIX ?= /usr/local
We ignore that, as it's the default. Can be overwritten by CMAKE_INSTALL_PREFIX.
CC = gcc
AR = ar
Ignore these as well. Use CMAKE_C_COMPILER and CMAKE_CXX_COMPILER to forcibly switch the compiler.
CFLAGS = -std=gnu99 -fPIC -Wall -Wno-unused-parameter -Wno-unused-function -I. -O4
They are pretty special for gcc-like compilers. Set them conditionally for CMAKE_C_COMPILER_ID MATCHES GNU further down after defining the target.
The standard is set by set(C_STANDARD 98) and set(CXX_STANDARD 98).
APRILTAG_SRCS := $(shell ls *.c common/*.c)
Define a variable listing all the source files individually: set(APRILTAG_SRCS ...)
APRILTAG_HEADERS := $(shell ls *.h common/*.h)
Define a variable listing all the header file individually: set(APRILTAG_HEADERS ...). However, you don't really need them anywhere (unless you want Visual Studio to list them).
APRILTAG_OBJS := $(APRILTAG_SRCS:%.c=%.o)
In most cases, you don't need that. For those rare cases there are Object Libraries.
TARGETS := libapriltag.a libapriltag.so
# LIBS := -Lusr/include/flycapture
We define our libraries here with add_library:
add_library(apriltag ${APRILTAG_SRCS})
target_include_directories(apriltag PUBLIC ${CMAKE_CURRENT_LIST_DIR}/include/apriltag)
target_compile_options(apriltag PUBLIC -fPIC -Wall -Wno-unused-parameter -Wno-unused-function -O4)
The switch between static and shared is done via BUILD_SHARED_LIBS on invocation of CMake.
.PHONY: all
all: $(TARGETS)
#$(MAKE) -C example all
Nothing to do here. CMake will automatically create that.
.PHONY: install
install: libapriltag.so
#chmod +x install.sh
#./install.sh $(PREFIX)/lib libapriltag.so #this should be the line that install the library
#./install.sh $(PREFIX)/include/apriltag $(APRILTAG_HEADERS)
#sed 's:^prefix=$$:prefix=$(PREFIX):' < apriltag.pc.in > apriltag.pc
#./install.sh $(PREFIX)/lib/pkgconfig apriltag.pc
#rm apriltag.pc
#ldconfig
CMake will ease this up by a magnitude:
install(TARGETS apriltag
ARCHIVE DESTINATION lib
RUNTIME DESTINATION bin
LIBRARY DESTINATION lib)
install(DIRECTORY include/
DESTINATION include/
FILES_MATCHING PATTERN *.h)
That will install the library static and shared library (whatever exists) and the header files.
libapriltag.a: $(APRILTAG_OBJS)
#echo " [$#]"
#$(AR) -cq $# $(APRILTAG_OBJS)
libapriltag.so: $(APRILTAG_OBJS)
#echo " [$#]"
#$(CC) -fPIC -shared -o $# $^
%.o: %.c
#echo " $#"
#$(CC) -o $# -c $< $(CFLAGS)
All this is not needed.
.PHONY: clean
clean:
#rm -rf *.o common/*.o $(TARGETS)
#$(MAKE) -C example clean
You don't need that. CMake will generate a clean target automatically.
Judging from TARGETS := libapriltag.a libapriltag.so, you'll defintely need add_library command to create targets.
Instead of gathering souces to be compiled using wildcards like APRILTAG_SRCS := $(shell ls *.c common/*.c) it is recommended to list them explicitly in add_library call. But if you really want to list them automatically, see file(GLOB ...) command. (There are some important things to be aware of, though, see Specify source files globally with GLOB?).
The clean target would be generated automatically by CMake.
Finally, see the documentation for install() command to create install rules.
Compiler flags are set using set(CMAKE_C_FLAGS "blabla"), or appended using set(CMAKE_C_FLAGS "${CMAKE_C_FLAGS} blabla").

Referencing gcc with yocto recipe Makefile, unable to find stdint

With Yocto 1.8 (fido), I am using a simple yocto recipe to run a Makefile.
SUMMARY = "PCI kernel module"
LICENSE = "GPLv2"
LIC_FILES_CHKSUM = "file://COPYING;md5=4a0f8ad6a793571b331b0e19e3dd925c"
inherit module
PR = "r0"
PV = "1.0"
SRC_URI = "file://Makefile \
file://COPYING \
file://code.c \
file://code.h \
"
S = "${WORKDIR}"
And here is the Makefile.
obj-m := code.o
SRC := $(shell pwd)
all:
$(MAKE) -C $(KERNEL_SRC) M=$(SRC)
modules_install:
$(MAKE) -C $(KERNEL_SRC) M=$(SRC) modules_install
clean:
rm -f *.o *~ core .depend .*.cmd *.ko *.mod.c
rm -f Module.markers Module.symvers modules.order
rm -rf .tmp_versions Modules.symvers
When running bitbake on this recipe, I get the following compilation errors.
error: no include path in which to search for stdint.h
| # include_next <stdint.h>
| ^
How do I configure this recipe to include gcc when compiling?
What does does your code.c look like?
You can't use userspace headers in a module, and as far as I know, stdint.h is header from userspace.
i think that is toolchain problem
if your files are .c file use ${CC} in make file to compile in yocto.
files are .cpp use ${CXX} in make file
then it will compile with yocto default toolchain

The makefile creates the object files in the src directory rather than objects folder

Thanks!, I have updated my makefile now. And the .o are created in the src directory.
here is the makefile and output. The makefile throws the error because all the .o are created in the src folders. I don't know why? I am new to Makefile so kindly please bear with my silly questions.
# This is the Vpath; as my source directory is in the src folder - all the .c files
#folder structure
#Gif_Utility
#-->src/*.c
#-->include/*.h
VPATH = src:include:objects
CFLAGS = -I ./include -g -Wall -DDEBUG
OBJS =./objects
# Look at the CFLAGS here; it has -DDEBUG because in my code, I have #ifdef DEBUG
# Look at the CFLAGS here; -Wall : To generate all the compiler warnings.
# include is required as my compilation depends on the .h files.
# The LD flags to link the shared objects
#LDFLAGS=
#in my mini-project, I am using maths library, Thus, I have lm.
# lc to link my main function with crt1.o
#what is the compiler, am I using.
#This is a good practice since I can modify these flags when cross-compiling.
cc= gcc
#PATH for the LIBS
#This might be useful while cross-compiling.
LIBS= -lm -lc
target: $(patsubst %.c,%.o,$(wildcard ./src/*.c))
#echo "making target"
#mkdir -p ./objects
$(cc) $(patsubst ./src/%.c,./objects/%.o,$(wildcard ./src/*.c)) $(LIBS) -o gif
./objects/%.o: ./src/%.c
#echo "making objects now"
$(cc) $(CFLAGS) $(LDFLAGS) -c $< -o $#
#It is always better to write a PHONY rule for a rules like clean.
#It may happen that in source sandbox, you have a clean file. This may invoke the clean file.
#In order to prevent invoking a clean file during make clean; We give this general rule as PHONY
#PHONY tells the MAKEFILE that there is a rule clean, not a file called clean.
#Generally use PHONY for all, install, clean, distclean,
.PHONY: clean
clean:
#echo "cleaning everything"
#rm -f *.o
#rm -f gif
#echo "clearning .o from src"
#rm -f ./src/*.o
#rm -f ./objects/*.o
$make target
cc -I ./include -g -Wall -DDEBUG -c -o src/sysm.o src/sysm.c
cc -I ./include -g -Wall -DDEBUG -c -o src/x86_main.o src/x86_main.c
src/x86_main.c:11:9: warning: second argument of ‘main’ should be ‘char **’ [-Wmain]
src/x86_main.c: In function ‘main’:
src/x86_main.c:16:9: warning: implicit declaration of function ‘display_init’ [-Wimplicit-function-declaration]
src/x86_main.c:19:9: warning: implicit declaration of function ‘Gif_Read’ [-Wimplicit-function-declaration]
making target
gcc ./objects/gif_display.o ./objects/gif_lzw.o ./objects/gif_read.o ./objects/sysm.o ./objects/x86_main.o -lm -lc -o gif
gcc: error: ./objects/gif_display.o: No such file or directory
gcc: error: ./objects/gif_lzw.o: No such file or directory
gcc: error: ./objects/gif_read.o: No such file or directory
gcc: error: ./objects/sysm.o: No such file or directory
gcc: error: ./objects/x86_main.o: No such file or directory
make: *** [target] Error
You need to fix your patsubst to change the directory part of the filenames as well as the suffixes:
$(patsubst ./src/%.c,./objects/%.o,$(wildcard ./src/*.c))
You have other issues in your makefile too, e.g. this target has the wrong prerequisite:
./objects/%.o: %.c
The source file should be something like ./src/%.c
And the rule for that target is wrong, it outputs to ./objects/$# which would expand to something like ./objects/./objects/x86_main.o

My makefile builds dependency files when not required - why?

I'm trying to create a generic makefile to build static libraries that my project uses. I've used the expertise on this site, as well as the GNU Make manual to help write the following makefile. It is working well apart from one annoying problem.
# Generic makefile to build/install a static library (zlib example)
ARCH = linux
CFLAGS = -O3 -Wall
# List of source code directories
SOURCES = src test utils
# List of header files to install
INCLUDES = src/zlib.h src/zconf.h
# Library to create
LIBNAME = libz.a
############################################################
BUILD_DIR = build/$(ARCH)
# Full path to the built library
TARGET = $(BUILD_DIR)/$(LIBNAME)
prefix = ../..
exec_prefix = prefix
libdir = $(prefix)/lib/$(ARCH)
includedir = $(prefix)/include
INSTALL_PROGRAM = install -D
INSTALL_DATA = $(INSTALL_PROGRAM) -m 644
CFILES := $(foreach dir,$(SOURCES),$(wildcard $(dir)/*.c))
OBJECTS := $(addprefix $(BUILD_DIR)/,$(CFILES:.c=.o))
DEPENDS := $(OBJECTS:.o=.d)
.PHONY: all installdirs install uninstall clean
# Default
all: $(DEPENDS) $(TARGET)
# Build the dependency files
# (GNU Make Manual 4.14 Generating Prerequisites Automatically)
$(BUILD_DIR)/%.d: $(BUILD_DIR)
#echo "build dep for $*.c as $#"
#$(CC) -M $(CFLAGS) $*.c > $#.tmp
#sed s~.*:~"$(BUILD_DIR)/$*.o $#:"~ $#.tmp > $#
#rm $#.tmp
# Link all changed object files into static library
$(TARGET): $(OBJECTS)
$(AR) -rc $(TARGET) $?
# Compile C source to object code
$(BUILD_DIR)/%.o: %.c
$(CC) $(CFLAGS) -c $< -o $#
# Create the necessary directory tree for the build
$(BUILD_DIR):
#for p in $(SOURCES); do mkdir -p $(BUILD_DIR)/$$p; done
# Create the necessary directory tree for installation
installdirs:
#mkdir -p $(libdir)
#mkdir -p $(includedir)
# Install the library and headers
install: all installdirs
$(INSTALL_DATA) $(TARGET) $(libdir)
for p in $(INCLUDES); do $(INSTALL_DATA) $$p $(includedir); done
# Remove the library and headers
uninstall:
rm -f $(libdir)/$(LIBNAME)
for p in $(notdir $(INCLUDES)); do rm -f $(includedir)/$$p; done
# Remove all build files
clean:
rm -fr $(BUILD_DIR)
# Pull in the dependencies if they exist
# http://scottmcpeak.com/autodepend/autodepend.html
-include $(DEPENDS)
The problem is that the dependency files are built when they don't need to be. e.g. make install shown below rebuilds the .d files before installing.
$make --version
GNU Make 3.81
$make
build dep for utils/utils.c as build/linux/utils/utils.d
build dep for test/test.c as build/linux/test/test.d
build dep for src/zutil.c as build/linux/src/zutil.d
...
{ continues on making the other .d files, then the .o files }
...
cc -O3 -Wall -c src/zutil.c -o build/linux/src/zutil.o
cc -O3 -Wall -c test/test.c -o build/linux/test/test.o
cc -O3 -Wall -c utils/utils.c -o build/linux/utils/utils.o
ar rc { ... .o files ... }
All good up to this point! But a 'make install' now will rebuild the .d files
$make install
build dep for utils/utils.c as build/linux/utils/utils.d
build dep for test/test.c as build/linux/test/test.d
build dep for src/zutil.c as build/linux/src/zutil.d
{ ... }
install -D -m 644 build/linux/libz.a ../../lib/linux
for p in src/zlib.h src/zconf.h; do install -D -m 644 $p ../../include; done
I tried to 'touch' the .d files when the objects are built, so the update time is newer than the .o files, but that had no effect. What's wrong with my makefile?
The problem is that you include the dependency files (whatever.d), and you also have a rule for building these files. So every time you use this makefile, no matter what target you specify, it will rebuild them, include them, and execute again.
Try this for an approach to dependency handling that solves this problem. Basically, you don't need a separate rule for foo.d, just make it a side effect of the foo.o rule (it takes some thought to realize that this will work).

Resources