I am copying two types of inputs (.y and .yuv) from server using make file target.
I Wants to copy gray images and yuv images at ../input folder from server location.
#++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++#
# Gray scale images
#++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++#
VID_INPUT_YUV_PATH = ../input
VID_INPUT_GRAYIMG_FILES = \
inputGray0.y \
inputGray1.y
VID_INPUTGRAY = $(addprefix $(VID_INPUT_YUV_PATH)/, $(VID_INPUT_GRAYIMG_FILES))
VID_INPUTGRAY_NOCLEAN = $(addprefix -e , $(VID_INPUTGRAY))
vpath %.y server:/stddataset/ped server:/stddataset/car
.PRECIOUS: $(VID_INPUT_YUV_PATH)/%
$(VID_INPUT_YUV_PATH)/% : %
mkdir -p $(VID_INPUT_YUV_PATH)
scp server:$^ $#
#++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++#
# YUV images
#++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++#
VID_INPUT_YUV_FILES = \
inputYuv0.yuv \
inputYuv1.yuv \
inputYuv2.yuv \
inputYuv3.yuv
VID_INPUT_YUV = $(addprefix $(VID_INPUT_YUV_PATH)/, $(VID_INPUT_YUV_FILES))
VID_INPUT_NOCLEAN = $(addprefix -e , $(VID_INPUT_YUV))
$(VID_INPUT_YUV) : $(VID_INPUTGRAY) $(VID_INPUT_YUV)
.PRECIOUS: $(VID_INPUT_YUV_PATH)/%.yuv
$(VID_INPUT_YUV_PATH)/%.yuv :
mkdir -p $(VID_INPUT_YUV_PATH)
scp server:/stddataset/crowd/yuv/$(notdir $#) $#
Error:
make: Circular ../input/ inputYuv0.yuv <- ../input/ inputYuv0.yuv dependency dropped.
make: Circular ../input/ inputYuv1.yuv <- ../input/ inputYuv0.yuv dependency dropped.
make: Circular ../input/ inputYuv1.yuv <- ../input/ inputYuv1.yuv dependency dropped.
make: Circular ../input/ inputYuv2.yuv <- ../input/ inputYuv0.yuv dependency dropped.
make: Circular ../input/ inputYuv2.yuv <- ../input/ inputYuv1.yuv dependency dropped.
make: Circular ../input/ inputYuv2.yuv <- ../input/ inputYuv2.yuv dependency dropped.
make: Circular ../input/ inputYuv3.yuv <- ../input/ inputYuv0.yuv dependency dropped.
make: Circular ../input/ inputYuv3.yuv <- ../input/ inputYuv1.yuv dependency dropped.
make: Circular ../input/ inputYuv3.yuv <- ../input/ inputYuv2.yuv dependency dropped.
make: Circular ../input/ inputYuv3.yuv <- ../input/ inputYuv3.yuv dependency dropped.
How to resolve this circular dependency.
Related
I am trying to build a kernel object for my usb ethernet 2.5 gbit lan interface.
I get the error:
paolo#debian:~/temp/Linux kernel 5.x4.x3.x2.6.x Driver/AX88179_178A_Linux_Driver_v1.20.0_source$ make
make -C /lib/modules/5.10.0-19-amd64/build M=/home/paolo/temp/Linux kernel 5.x4.x3.x2.6.x Driver/AX88179_178A_Linux_Driver_v1.20.0_source modules
make[1]: Entering directory '/usr/src/linux-headers-5.10.0-19-amd64'
make[2]: *** No rule to make target 'kernel'. Stop.
make[1]: *** [/usr/src/linux-headers-5.10.0-19-common/Makefile:185: __sub-make] Error 2
make[1]: Leaving directory '/usr/src/linux-headers-5.10.0-19-amd64'
make: *** [Makefile:31: default] Error 2
the relevant part of the Makefile:
CURRENT = $(shell uname -r)
TARGET = ax88179_178a
OBJS = ax88179_178a.o
MDIR = drivers/net/usb
KDIR = /lib/modules/5.10.0-19-amd64/build
SUBLEVEL= $(shell uname -r | cut -d '.' -f 3 | cut -d '.' -f 1 | cut -d '-' -f 1 | cut -d '_' -f 1)
USBNET = $(shell find $(KDIR)/include/linux/usb/* -name usbnet.h)
ifneq (,$(filter $(SUBLEVEL),14 15 16 17 18 19 20 21))
MDIR = drivers/usb/net
endif
EXTRA_CFLAGS = -DEXPORT_SYMTAB
PWD = $(shell pwd)
DEST = /lib/modules/$(CURRENT)/kernel/$(MDIR)
obj-m := $(TARGET).o
default:
make -C $(KDIR) M=$(PWD) modules
I have installed the kernel sources from the package repository and the corresponding package linux-headers for my uname -r kernel version
Thanks a lot for your help
I have a repository structure where dependencies can either be svn:external'd either in this repository or in a super-repository which has svn:external'd this one. The externals are only one level deep and so if my repo is externalized by a super-repository, then I need to be able to detect where to find the dependency at a higher level, and copy over all relevant data. If the dependency is indeed found in my own repository, then I need to build it.
I am having problems creating my makefile recipe to do this. Here is what I have so far:
DEPENDENCIES = dep1 dep2
ROOTDIR = .
deps :
for dep in $(DEPENDENCIES); do \
if [ -e $(ROOTDIR)/ext/$$dep ]; then \
depdir = $(ROOTDIR)/ext/$$dep; \
$(MAKE) -C $depdir; \
elif [ -e $(ROOTDIR)/../$$dep ]; then \
depdir = $(ROOTDIR)/../$$dep; \
else \
$(error Could not find dependency: $$dep) \
fi \
cp $$depdir/bin/* $(ROOTDIR)/bin; \
cp $$depdir/lib/* $(ROOTDIR)/lib; \
cp $$depdir/inc/$$dep $(ROOTDIR)/inc/$$dep; \
done
First problem is the $(error ) line. I'd like to be able to throw an error, but this is clearly not subjected to the bash condition statements. This is the output:
$ make deps
makefile:108: *** Could not find dependency: $dep. Stop.
If I comment out that else statement, then I'm still having troubles
$ make deps
for dep in dep1 dep2; do \
if [ -e ./ext/$dep ]; then \
/bin/sh: -c: line 2: syntax error: unexpected end of file
make: *** [makefile:106: deps] Error 1
Could someone provide some hints regarding how to accomplish this? I'm running GNU make in both cygwin and linux environments.
Edit: I'd really prefer to keep this as close to make as possible (and as little shell stuff). I think I've gotten a little closer, but still need to repeat this for each item in $(DEPENDENCIES).
DEPENDENCIES = foo bar
ROOTDIR = .
EXTDIR = $(ROOTDIR)/ext
BINDIR = $(ROOTDIR)/bin
INCDIR = $(ROOTDIR)/inc
# Need a foreach DEP in $(DEPENDENCIES) here
ifneq("$(wildcard $(EXTDIR)/$(DEP))","")
DEPDIR = $(EXTDIR)/$(DEP)
BUILDDEP = $(MAKE) -C $(DEPDIR)/build
else ifneq("$(wildcard $(ROOTDIR)../$(dep))", "")
DEPDIR = $(ROOTDIR)/../$(dep)
else
$(error Could not find dependency: $(DEP))
endif
$(DEPDIR) :
$(BUILDDEP)
cp $(DEPDIR)/bin/* $(BINDIR)
cp $(DEPDIR)/inc/$(DEP)/* $(INCDIR)/$(DEP)
Edit2:
I think I'm getting closer. The following looks more like what I want, but it still have problems:
1) I don't know how to call each recipe
2) It doesn't give an error if it doesn't find all dependencies
3) It doesn't let me dictate the build order
4) It doesn't let me filter to use only folders listed in dependencies (it does all folders)
ifneq "$(wildcard $(EXTDIR)/%/build)" ""
$(EXTDIR)/%:
$(MAKE) -C $(EXTDIR)/%/build
cp $(EXTDIR)/%/bin/* $(BINDIR)
cp $(EXTDIR)/%/int/*.a $(INTDIR)
cp $(EXTDIR)/%/inc/%/* $(INCDIR)/%
endif
ifneq "$(wildcard $(ROOTDIR)/../%/build)" ""
DEPDIR = $(ROOTDIR)/..
$(DEPDIR)/%:
cp $(DEPDIR)/%/bin/* $(BINDIR)
cp $(DEPDIR)/%/int/*.a $(INTDIR)
cp $(DEPDIR)/%/inc/%/* $(INCDIR)/%
endif
Edit3
After being told I was trying to solve too many problems at once, I've reduced it to this:
DEPENDENCIES = dep1 dep2 dep3
for each DEP in $(DEPENDENCIES)
$(DEP) :
$(MAKE) -C ../ext/$(DEP)
How can I create a recipe ($(DEP) ) for each item in $(DEPENDENCIES)?
Solved. This solves the problem above:
DEPENDENCIES = dep1 dep2 dep3
$(DEPENDENCIES) :
$(MAKE) -C ../ext/$#
The answer is very simple. I wish I knew enough about this stuff to ask a more legible question.
If a file exists, I want to add a target to build. If the file does not exist, I want the target to be skipped.
an example:
FILENAME = f
TARGETS := normal
ifneq($(shell stat test_$(FILENAME).c), "")
TARGETS += test
endif
all: $(TARGETS)
normal:
#echo normal
test:
#echo test
I'm not sure the $(shell stat ...) part even works, but the bigger problem is that make with any file test_f.c in the current folder gives:
Makefile:4: *** multiple target patterns. Stop.
Removing the ifneq ... endif block makes the target normal. How can I only run the target test if test_f.c exists?
What you can do is generate a string variable (let's call it OPTIONAL) such that when 'test_f.c' exists, OPTIONAL=test; otherwise, OPTIONAL=_nothing_. And then add OPTIONAL as a prerequisite of all. e.g.:
FILENAME = f
TARGETS = normal
OPTIONAL = $(if $(wildcard test_f.c), test, )
all: $(TARGETS) $(OPTIONAL)
normal:
#echo normal
test:
#echo test
You can also iterate over targets with for loop
.PHONY: all
RECIPES = one
all: RECIPES += $(if $(wildcard test_f.c), two, )
all:
for RECIPE in ${RECIPES} ; do \
$(MAKE) $${RECIPE} ; \
done
one:
$(warning "One")
two:
$(warning "Two")
> make
for RECIPE in one ; do \
/Applications/Xcode.app/Contents/Developer/usr/bin/make ${RECIPE} ; \
done
makefile:11: "One"
make[1]: `one' is up to date.
> touch test_f.c
> make
for RECIPE in one two ; do \
/Applications/Xcode.app/Contents/Developer/usr/bin/make ${RECIPE} ; \
done
makefile:11: "One"
make[1]: `one' is up to date.
makefile:14: "Two"
make[1]: `two' is up to date.
I have a Makefile to compile several fortran files, most of which are module files. Whenever I changed the module file and initiate make command, the make says:
make: `PRM' is up to date.
PRM is the executable name. No such problem when I changed the main file. Another problem is that sometimes I also get:
make: m2c: Command not found
error. My makefile looks like:
.SUFFIXES: .f90
F90 = pgf90
NETCDF_DIR = /opt/netcdf
F90_FLAGS = -Mbackslash -Mlarge_arrays
LIBS = -L$(NETCDF_DIR)/lib -lnetcdff -lnetcdf
INCLUDE_MODULES = -I$(NETCDF_DIR)/include
VPATH = /path/FORTRAN
util_module = \
precmod.o \
strings.o
EXEC = PRM
OBJS = \
${util_module} \
mo_date.o \
mo_utils.o \
module_metcro_lib.o \
module_plumerise1.o \
module_finn_lib.o \
main_plm.o
${EXEC} : ${OBJS}
${F90} -o $# ${OBJS} ${LIBS}
.f90.o:
${F90} -c ${F90_FLAGS} ${INCLUDE_MODULES} $<
clean:
rm -f ${EXEC} ${OBJS} *.mod
thanks for answering!
I'm trying to create a Makefile which can build/clean recursively when it's called. I have the build working, but I'm getting errors with the clean command.
My directory structure is something like:
main
|
+-- Makefile
|
+-- common
| |
| +-- gcas_debug
| | |
| | +-- Makefile
| + -- gcas_nvdata
| |
| +-- Makefile
+-- gcinit
+-- Makefile
When I call make in the main directory it goes through and builds everything as I desire, but when I call make clean it does with:
mike#mike-VirtualBox:~/iCOM/framework$ make clean
for d in common/gcas_debug common/gcas_nvdata; \
do \
make --directory=$f clean; \
done
make: the `-C' option requires a non-empty string argument
Usage: make [options] [target] ...
Options:
-b, -m Ignored for compatibility.
...
I don't understand why the clean command isn't working... Any suggestions?
Full (main) Makefile:
lib_gcas_debug := common/gcas_debug
lib_gcas_nvdata := common/gcas_nvdata
libraries := $(lib_gcas_debug) $(lib_gcas_nvdata)
DESTDIR=$(PWD)/output
bindir=
gc_init := gcinit
EXE := $(gc_init)/$(gc_init)
.PHONY: all $(gc_init) $(libraries)
all: $(gc_init)
$(gc_init) $(libraries):
$(MAKE) --directory=$#
$(gc_init): $(libraries)
install: $(gc_init)
install -d -m 0755 $(DESTDIR)$(bindir)
install -m 0755 $(EXE) $(DESTDIR)$(bindir)
clean:
for d in $(libraries); \
do \
$(MAKE) --directory=$$f clean; \
done
EDIT: If I swap the for d with for $d I get instead:
mike#mike-VirtualBox:~/iCOM/framework$ make clean
for in common/gcas_debug common/gcas_nvdata; \
do \
make --directory= clean; \
done
/bin/sh: -c: line 0: syntax error near unexpected token `common/gcas_debug'
/bin/sh: -c: line 0: `for in common/gcas_debug common/gcas_nvdata; \'
make: *** [clean] Error 1
This worked for me:
SUBDIRS := foo bar baz
.PHONY: subdirs $(SUBDIRS) clean all
subdirs: $(SUBDIRS)
$(SUBDIRS):
$(MAKE) -C $# $(MAKECMDGOALS)
clean: $(SUBDIRS)
rm -rf dist
dist: $(SUBDIRS) dist/.build_marker
dist/.build_marker:
mkdir -p dist
for d in $(SUBDIRS) ; do cp $$d/dist/* dist ; done
touch dist/.build_marker
I only need to use the for loop in the dist target to copy files. This allows make -j build parallelism, not to mention simpler-to-read Makefiles.
Read the for loop again:
for d in [...]; do make --directory=$f
Didn't you mean $d, as in
for d in [...]; do make --directory=$d
So, the Makefile should look:
for d in common/gcas_debug common/gcas_nvdata; \
do \
make --directory=$d clean; \
done