Design a 3 input XOR gate using a decoder and one OR gate
I tried to first make the truth table for it and simplify it to make it have only 2 outputs with midterms but I don't know what do next
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I know that for a NAND and NOR gate, the resulting gate now acts as a NOT gate. But I'm confused on how it will act for XOR.
Is it possible to create a full subtractor using half adders only? I have created a circuit with 2 half adders but cannot see how I can use half adders to get the borrow.
This is what I have done so far: http://i.stack.imgur.com/sO6bK.png
I need to know if this can be done using half adders only.
Implementation using half subtractors only:
(a) We use the borrow out of a half subtractor to create a HS that has the same function of an AND gate.
(b) We can also use a HS with the first input = 1 to get the complementary output (the same function of a NOT gate.
We put (b) after (a)'s output and we have a NAND gate. Everything can be implemented using NAND or NOR gates. So here's the final circuit:
http://i.stack.imgur.com/cpPhN.png
We have created the equivalents of AND, OR gates using our new NAND "gates".
I'm working on a circuit which performs basic operations such as addition and subtraction using logic gates.
Right now, it takes 3 inputs, two 4 bit numbers, and a 3 bit opcode which indicates what operation to perform.
It seems that a 3-8 decoder would be a good idea here. This is my mockup!
To give a little more context, here is what my adder circuit looks like (+). I designed it to take two 4 bit numbers X & Y:
However, what I am confused about is the fact that I have to feed in 4 inputs or 4 wires to each of the circuit that handles it's respective operations (+, -, =, etc). It appears to only connect one wire to the circuit I need to get to. I need to actually connect 8 wires, as I have to feed in the to 4 bit numbers.
UPDATE: I ended up using a MUX to select the output that I want.
An adder doesn't need an input to tell it to add, because that's all it does.
A 4-bit full adder should have
4 input signals for each operand, total 8
A carry-in input signal if you are also using it for subtraction
5 output signals, the high-order one may be used to generate an overflow flag
Your decoder is a separate component from all the function generators. You could put a tristate buffer on each function generator to connect them to a common data bus, and then the decoder would generate the tristate enable signals. Otherwise, you probably don't need a decoder, but you might look at a multiplexer (mux) instead.
I want to know that if I can implement or,and functions using only xor. I think It is impossible but I need to prove that. Any ideas?
Thanks in advance.
You cannot implement OR or AND gate only by using XOR because it is not a universal gate.
Also the XOR function can't tell the difference between '1,1' and '0,0' at it's inputs. Inverting the inputs/output in whatever combination makes a new gate with an XOR or XNOR function.
Here is an argument against XOR and XNOR as universal gates.
An XOR gate is a parity generator. Cascading parity generators always
produce parity generators. AND and OR are not parity functions.
An XOR gate can be used as an inverter. An XNOR gate is an XOR
followed by an inverter, so it is also a parity generator.
Yes, we can make other Gates using just XOR gate. But its inadvisable as each XOR gate will use atleast 6 to 8 MOSFETS. Also, I will be assuming Open Drain gate designs so that we can use wired ANDing. Else it is impossible to make any Gate apart from NOT and XNOR using just XOR gates.
Coming back to your question:
NOT GATE:
Easiest one
NOT GATE
OR GATE:
A bit tricky but doable using wired AND.
OR GATE
AND GATE:
Can be done in 2 ways:
(1) Wired AND: Since we already have access to wired AND.
(2) Gates: This will improve drive strength but eat up gates.
It’s basically bubbled OR followed by a Not Gate.
So to answer your question in brief:
It’s not possible to design using purely logic because of the nature of XOR. It cannot differentiate between inputs as both ‘0’ and both ‘1’.
But as you can see at transistor level it can be solved.
Are the xor gate and the not gate logically complete. In other words, can we implement an logic circuit using them?
NOR and NAND are the only functionally complete singleton gate sets. Hence, XOR is not functionally complete on its own (or together with NOT, since as point out above NOT can be created using XOR).
XOR can be complemented to a two-element functionally complete gate sets. One should add (left or right) implication.
You can find more about such sets in Wernick, William (1942) "Complete Sets of Logical Functions," Transactions of the American Mathematical Society 51: 117–32.
All of the basic logic gates may be created with the NOT gate. An XOR gate acts as a NOT gate if one of the inputs are permanently zero.
AND: NOT(NOT(A) OR NOT(B))
OR: (may be made simply by connecting wires together, and maybe use some diodes)
NAND: NOT(A) OR NOT(B)
XOR: NOT(NOT(A) OR NOT(NOT(A) OR NOT(B))) OR NOT(NOT(NOT(A) OR NOT(B)) OR NOT(B))
ect.