I have a makefile and all I want to do is to make my executable go to the folder created in the one I have all the files in. So let's say I have a folder in which there are some .cpp files, I create a folder in this folder called OUTPUT (during compilation) and I want my exec made out of those cpp files to go into this folder.
How do i do that?
Thanks in advance!
OUTPUT/exec: foo.cpp bar.cpp baz.cpp
g++ $^ -o $#
Refinements are possible, but this will get you started.
Related
I am new to using makefile in Windows, and I've been trying hard to learn this.
When I try to delete object files using clean option, it keeps making errors.
There's Makefile and 3 sub-directories and each sub-directory has a .cpp file. I want to delete .o files in each sub-directory, but when I write down my code like
clean:
delete *.o
it doesn't work.
How can I delete object files in sub-directories?
I need to modify some of my project's sources during compilation. It'd be better if I get to modify them between preprocessing and compilation, but I know it's harder to achieve (The solution proposed here is not optimal for me) so I can settle with a pre-preprocessing step.
Since the source files are to be modified, I need to create a copy of them, modify that copy then run the build on this copy. My current solution is:
Prior to cmake invocation, I copy most of the project root contents' to a separate directory. This is required because there are many script invocations during the build so I need to keep most of the project hierarchy intact. Since there are many files and many of them will not be modified, I first copy all files as symbolic links (cp -sR), then hard copy all .c and .h files. Then I just cd to that directory and invoke cmake and make as usual.
The problem here is that since cmake is not aware that it's working on copies of the actual source, the generated Makefile doesn't check whether the actual source was updated. So I need a full rebuild (Full project tree copy and cmake invocation) whenever I modify a single source file.
This can probably be solved by adding a custom command for each hard copied source file that depends on the actual source file, and recopies it after being modified. I guess it's okay, but it really is... ugly, and requires lots of cmake additions. I don't think what I'm trying to do is so exotic, so I believe there is a better option that could work with little changes to my cmake. I'd also like to hear ideas regarding post preprocessor step invocation.
EDIT: A simplified example case.
This is the project tree:
CMakeLists.txt
src/
CMakeLists.txt
file1.c
file1.c
python/
script.py
The root CMakeLists.txt is add_subdirectory(src/). The src/CMakeLists.txt is add_executable(myexe file1.c file2.c).
I need to execute python python/script.py for each source file, so it should be called on src/file1.c and src/file2.c.
My current solution is a build script as follows:
rm -r build_dir
mkdir build_dir
cp -rt build_dir CMakeLists.txt src/ python/
cd build_dir
cmake .
make # ...
Plus an invocation of python/script.py (prebuild add_custom_command) which globs for the relevant files itself, then processes them.
I am trying to write script to run PC-Lint Static analyzer tool on only locally modified files by user and not on whole project.
For that I need to run Lint command on all locally modified files
using svn status
svn status -u | grep -w M
command I get list of locally modified files with its full path
For Example if locally modified file is asn1_common_elements.c, the above svn command will give output as
M 10014 \Implementations\asn1der\src\asn1_common_elements.c
now I need to take only filename asn1_common_elements.c and put it with LINT command as LINT asn1_common_elements.log (instead of .c need to change to .log)
How can I achieve this?
You could use a Makefile's ability to only let the compiler to compile only the changed files.
Do something like this in the Makefile:
# Create object from C source code
file.o: file.c
gcc -c $(CFLAGS) -o $#
wine lint-nt.exe file.c
Now the file.c will get analysed only when it is changed.
I have a folder with 354 .f90 modules (and the main file). In the readme this is suggested:
The best approach is to unzip the archive source.zip extracting all
354 program files into a directory of your choice. Then you can
compile with the command
gfortran *.f90 -o app.exe
I'm on Mac so i installed gfortran but doing the command written above doesn't work:
gfortran: *.f90: No such file or directory
So I suppose that a bash script is needed (or at least a makefile).
I'm not used to doing this so what should I do? Does there exist some automatic makefile generator?
It was just a stupidity issue. The extension of the files was .F90 and not .f90. With:
gfortran -o app *.F90
it worked.
I use the GCC compiler.
When compiling a program one often needs to link in a huge number of library files like .so extension to get the program to work.
Now for the C program that I am writing all the library files I need to link are inside a folder.
What should I write in my GNU Makefile if I wish to link ALL the library files in that folder to my program/executable.
target.exe: target.o
gcc -o target.exe target.o libdir/*.so