Makefile, Loading External Source - makefile

Whatever, I don't really care about the privacy anymore. If it does work, what is the point of keeping it? I will change the file names a little however. This is the original code.
CXX=g++
CXXFLAGS= -Wall
LDFLAGS=-Wno-deprecated -fPIC -pthread
DIR=Exedir/
EXOoffline=EXOdir/offline/
EXOofflinelib=utilities/misc utilities/database utilities/calib reconstruction analysis/manager analysis/jni analysis/root geant/EXOsim
LIBRARY=-lGui -L/usr/lib/root/5.09 -lMinuit -L/nfs/rabbitybunny/g/exo-software/software/hudson/builds-rhel5/build-id/1077/lib -lEXOUtilities -lEXOSim -lEXOROOT -lEXODBUtilities -lEXOAnalysisManager -lEXOAnalysisJNI -lEXOCalibUtilities -lEXOReconstruction -L/afs/rabbitybunny.edu/package/cernroot/vol35/52800svn/Linux26SL5_i386_gcc412/lib -lTreePlayer
INCLUDE=-I $(ROOTSYS)/include `root-config --glibs` -I /nfs/rabbitybunny/g/exo/software/builds/current/include
INCLUDE+=$(addprefix -I$(EXOoffline),$(EXOofflinelib))
all: run
run: main.o
$(CXX) main.o -o $(DIR)$# $(LIBRARY)
.cpp.o:
$(CXX) $(CXXFLAGS) $(INCLUDE) -c -o $# $<
#run: main.cpp
# $(CC) $(CFLAGS) $(LDFLAGS) $(INCLUDE) $(LIBRARY) main.cpp -o $(DIR)$#
.PHONY: clean
clean:
rm -rf *.o $(DIR)run
and I get this.
rabbitybunny#enigma $ make clean
rm -rf *.o Exedir/run
rabbitybunny#enigma $ make
g++ -Wall -I /afs/rabbitybunny.edu/package/cernroot/vol35/52800svn/Linux26SL5_i386_gcc412/include `root-config --glibs` -I /nfs/rabbitybunny/g/exo/software/builds/current/include -IEXOdir/offline/utilities/misc -IEXOdir/offline/utilities/database -IEXOdir/offline/utilities/calib -IEXOdir/offline/reconstruction -IEXOdir/offline/analysis/manager -IEXOdir/offline/analysis/jni -IEXOdir/offline/analysis/root -IEXOdir/offline/geant/EXOsim -c -o main.o main.cpp
g++: -lCore: linker input file unused because linking not done
g++: -lCint: linker input file unused because linking not done
g++: -lRIO: linker input file unused because linking not done
g++: -lNet: linker input file unused because linking not done
g++: -lHist: linker input file unused because linking not done
g++: -lGraf: linker input file unused because linking not done
g++: -lGraf3d: linker input file unused because linking not done
g++: -lGpad: linker input file unused because linking not done
g++: -lTree: linker input file unused because linking not done
g++: -lRint: linker input file unused because linking not done
g++: -lPostscript: linker input file unused because linking not done
g++: -lMatrix: linker input file unused because linking not done
g++: -lPhysics: linker input file unused because linking not done
g++: -lMathCore: linker input file unused because linking not done
g++: -lThread: linker input file unused because linking not done
g++: -lGui: linker input file unused because linking not done
g++: -lm: linker input file unused because linking not done
g++: -ldl: linker input file unused because linking not done
g++ main.o -o Exedir/run -lGui -L/usr/lib/root/5.09 -lMinuit -L/nfs/rabbitybunny/g/exo-software/software/hudson/builds-rhel5/build-id/1077/lib -lEXOUtilities -lEXOSim -lEXOROOT -lEXODBUtilities -lEXOAnalysisManager -lEXOAnalysisJNI -lEXOCalibUtilities -lEXOReconstruction -L/afs/rabbitybunny.edu/package/cernroot/vol35/52800svn/Linux26SL5_i386_gcc412/lib -lTreePlayer
Thanks for helping, I would really appreciate so.
(Maybe I should learn to use cmake instead.)

I think your problem comes from the root-config command in the INCLUDE macro:
INCLUDE=-I $(ROOTSYS)/include `root-config --glibs` ...
If you run that, it will probably list a whole bunch of -lXxx options — the ones the compiler is saying are unused because you aren't linking when you create an object file.
Run root-config --glibs and look at the output. Then find a different option to generate the include options instead of the libraries.

I don't have any idea why you're creating a brand new question that essentially duplicates your existing question, except the examples are tidier. Why not just edit your existing question?
Anyway, the problem is that the rule .cpp.o is compiling the code (turning the source file .cpp into an object file .o), but you're passing linker flags to it (-L$(LIBDIR) etc.) Similarly, when you link the code with the run target, you don't pass linker flags to it.
Also generally you do NOT want to put the -c flag in the CXXFLAGS variable, because generally you want to use that variable on both the compile and link lines to be sure that your flags are consistent.
Rewrite:
CXX = g++
CXXFLAGS = -wall
CPPFLAGS = -I$(INCDIR)
all: run
run: run.o
$(CXX) $(CXXFLAGS) run.o -o $# -L$(LIBDIR) -lpng
.cpp.o:
$(CXX) $(CXXFLAGS) $(CPPFLAGS) -c -o $# $<

Related

Can't use LAPACK in makefile

I have program (in fortran) where I'm using three custom modules, which make use of LAPACK. Until now I've compiled my program using the following shell script:
filestring="main"
gfortran -c mod_exp.f90 mod_genmat.f90 mod_print.f90 $filestring.f90
gfortran mod_exp.o mod_genmat.o mod_print.o $filestring.o -llapack -lblas
rm mod_exp.o mod_genmat.o mod_print.o $filestring.o exponentiate.mod genmat.mod printing.mod printing_subrtns.mod
mv a.out $filestring
Since I've been using more and more modules and different programs using them, I've decided to start using makefiles. Following a tutorial, I managed to write the following:
FC = gfortran
FFLAGS = -Wall -Wextra -llapack -lblas #-fopenmp
SOURCES = mod_print.f90 mod_genmat.f90 mod_exp.f90 main.f90
OBJ = ${SOURCES:.f90=.o} #substitute .f90 with .o
%.o : %.f90 #creation of all *.o files DEPENDS on *.f90
$(FC) $(FFLAGS) -c -O $< -o $#
main: $(OBJ)
$(FC) $(FFLAGS) -o $# $(OBJ)
clean:
#rm -f *.o *.mod main
However, when executing make, it says that the LAPACK functions are not recognized. One such mistake is the following:
/usr/bin/ld: mod_exp.o: in function `__exponentiate_MOD_diagun':
mod_exp.f90:(.text+0x37f): undefined reference to `zgees_'
...
collect2: error: ld returned 1 exit status
One possible mistake I've seen is that I need to specify the location of the libraries. However, it would seem strange since I didn't need to do it before; also, I don't know how to find it.
Please show the link command that make invoked, that caused the error to be generated.
I'm confident that if you cut and paste that exact command line to your shell prompt, you will get the same error you see when make runs it. So the problem is not make, but your link command.
The problem is that you have put the libraries before the objects in the link line. Libraries should come at the end, after the objects, else when the linker examines the libraries it doesn't know what symbols will need to be included (because no objects have been parsed yet to see what symbols are missing).
This is why LDLIBS is traditionally a separate variable:
FC = gfortran
FFLAGS = -Wall -Wextra #-fopenmp
LDLIBS = -llapack -lblas
SOURCES = mod_print.f90 mod_genmat.f90 mod_exp.f90 main.f90
OBJ = ${SOURCES:.f90=.o} #substitute .f90 with .o
%.o : %.f90 #creation of all *.o files DEPENDS on *.f90
$(FC) $(FFLAGS) -c -O $< -o $#
main: $(OBJ)
$(FC) $(FFLAGS) -o $# $(OBJ) $(LDLIBS)

Makefile for AVR

I have folder "I2C AtMega32":
and I have my simply Makefile:
all: main.hex program clean
main.o: main.cpp BMP280_driver-master\bmp280.c
avr-gcc -Wall -Os -mmcu=atmega32 -c $< -o $#
main.elf: main.o
avr-gcc -Wall -Os -mmcu=atmega32 -o main.elf main.o
main.hex: main.elf
avr-objcopy -j .text -j .data -O ihex main.elf main.hex
avr-size --format=avr --mcu=atmega32 main.elf
program:
#program uC
.PHONY: clean
clean:
rm main.o main.elf
During the makefile working there is some errors:
Why it is no working?
The main issue is it looks like you are trying to compile two different compilation units into one object file. I would be surprised if GCC supports that, since I've never seen it before. Compile an object with gcc for each C source file, then compile an object with g++ for each C++ source file, then link them all together.
Also note that $< is just the name of the first prerequisite (main.cpp) so you never even attempted to compile the bmp280 code. Pay attention carefully to the commands your Makefile is running when you want to debug your build.
By the way, the all target should just build your HEX file. You can run make program or make clean separately to perform those tasks, and the program target should of course depend on main.hex.

Makefile: "No such file or directory" for target file

First, I should admit makefiles are something that I'm very inexperienced at, so I apologize if this is an error that I should have been able to solve myself, but I have spent several hours on this, including reading the various answers on this site, and have been unable to discover a solution.
With that said, I have created the following makefile to compile my code on a Linux machine; it completes the sub compilations just fine, but when it comes to making the output itself, xPlatST, it throws an error.
g++ -std=c+=11 -g -Wall -pthread -c -o xPlatST.o xPlatST.cpp
g++ -std=c+=11 -g -Wall -pthread -c -o stdafx.o stdafx.cpp
g++ -std=c+=11 -g -Wall -pthread -c xPlatST xPlatST.o stdafx.o -L../hwloc
g++ error: xPlatST: No such file or directory
make: *** [xPlatST] Error 1
I believe it seems to think that the xPlatST is one of it's compilation files and thus can't find it, but for the life of me I can't work out why.
hwloc is a third party library, and should be unrelated to this issue. The code compiles just fine when compiled from the command line directly.
My files are xPlatST.cpp, xPlatST.h, stdafx.cpp, stdafh.h
Code is as follows:
CXX = g++ -std=c++11
INCLUDES =
LIBS = -L../hwloc
CXXFLAGS = -Wall -g -pthread
OBJS = xPlatST.o stdafx.o
xPlatST: ${OBJS}
${CXX} ${CXXFLAGS} ${INCLUDES} -c $# ${OBJS} ${LIBS}
clean:
-rm xPlatST *.o
Any help would be greatly appreciated; thank you in advance.
Your assumption is correct. Your recipe is trying to use xPlatST as a source. Change the -c into a -o in your rule:
${CXX} ${CXXFLAGS} ${INCLUDES} -o $# ${OBJS} ${LIBS}
The -c flag tells the compiler to take all files, compile, and assemble them into an object file (.o). The -o flag specifies the destination file.

The makefile creates the object files in the src directory rather than objects folder

Thanks!, I have updated my makefile now. And the .o are created in the src directory.
here is the makefile and output. The makefile throws the error because all the .o are created in the src folders. I don't know why? I am new to Makefile so kindly please bear with my silly questions.
# This is the Vpath; as my source directory is in the src folder - all the .c files
#folder structure
#Gif_Utility
#-->src/*.c
#-->include/*.h
VPATH = src:include:objects
CFLAGS = -I ./include -g -Wall -DDEBUG
OBJS =./objects
# Look at the CFLAGS here; it has -DDEBUG because in my code, I have #ifdef DEBUG
# Look at the CFLAGS here; -Wall : To generate all the compiler warnings.
# include is required as my compilation depends on the .h files.
# The LD flags to link the shared objects
#LDFLAGS=
#in my mini-project, I am using maths library, Thus, I have lm.
# lc to link my main function with crt1.o
#what is the compiler, am I using.
#This is a good practice since I can modify these flags when cross-compiling.
cc= gcc
#PATH for the LIBS
#This might be useful while cross-compiling.
LIBS= -lm -lc
target: $(patsubst %.c,%.o,$(wildcard ./src/*.c))
#echo "making target"
#mkdir -p ./objects
$(cc) $(patsubst ./src/%.c,./objects/%.o,$(wildcard ./src/*.c)) $(LIBS) -o gif
./objects/%.o: ./src/%.c
#echo "making objects now"
$(cc) $(CFLAGS) $(LDFLAGS) -c $< -o $#
#It is always better to write a PHONY rule for a rules like clean.
#It may happen that in source sandbox, you have a clean file. This may invoke the clean file.
#In order to prevent invoking a clean file during make clean; We give this general rule as PHONY
#PHONY tells the MAKEFILE that there is a rule clean, not a file called clean.
#Generally use PHONY for all, install, clean, distclean,
.PHONY: clean
clean:
#echo "cleaning everything"
#rm -f *.o
#rm -f gif
#echo "clearning .o from src"
#rm -f ./src/*.o
#rm -f ./objects/*.o
$make target
cc -I ./include -g -Wall -DDEBUG -c -o src/sysm.o src/sysm.c
cc -I ./include -g -Wall -DDEBUG -c -o src/x86_main.o src/x86_main.c
src/x86_main.c:11:9: warning: second argument of ‘main’ should be ‘char **’ [-Wmain]
src/x86_main.c: In function ‘main’:
src/x86_main.c:16:9: warning: implicit declaration of function ‘display_init’ [-Wimplicit-function-declaration]
src/x86_main.c:19:9: warning: implicit declaration of function ‘Gif_Read’ [-Wimplicit-function-declaration]
making target
gcc ./objects/gif_display.o ./objects/gif_lzw.o ./objects/gif_read.o ./objects/sysm.o ./objects/x86_main.o -lm -lc -o gif
gcc: error: ./objects/gif_display.o: No such file or directory
gcc: error: ./objects/gif_lzw.o: No such file or directory
gcc: error: ./objects/gif_read.o: No such file or directory
gcc: error: ./objects/sysm.o: No such file or directory
gcc: error: ./objects/x86_main.o: No such file or directory
make: *** [target] Error
You need to fix your patsubst to change the directory part of the filenames as well as the suffixes:
$(patsubst ./src/%.c,./objects/%.o,$(wildcard ./src/*.c))
You have other issues in your makefile too, e.g. this target has the wrong prerequisite:
./objects/%.o: %.c
The source file should be something like ./src/%.c
And the rule for that target is wrong, it outputs to ./objects/$# which would expand to something like ./objects/./objects/x86_main.o

Gcc error only when using makefile (CreateProcess: No such file or directory)

I am having trouble compiling using make in windows 7 with gcc and the gsl library. It occurs only when using make (when I type the compilation commands manually into the cmd line, it compiles correctly). I found some posts where people had similar errors from gcc, but none where it worked when typing normally, but not when using make. The contents of my Makefile are shown below:
#Compiler
COMP=gcc
# Compiler Flags. -Wall turns on all warnings
FLAGS=-Wall
# GSL include file dir
INCLUDES=GnuWin32/include
# GSL Libraries directory
LIB=GnuWin32/lib
# Library Flags
LFLAGS=-lgsl -lgslcblas -lm
# Target Program
EXE=ex2.1.exe
# Dependencies needed for $(PROGRAM)
OBJ=ex2.1.o
# List of source files for objects
SRC=ex2.1.c
# List with types of files to be cleared by clean:
TRASH=*.exe *.o
# I/O files to be cleaned with 'very clean' target
#IOFILES= *.dat *.out *.csv *.mod
all: $(SRC) $(EXE)
$(EXE): $(OBJ)
$(COMP) -L/$(LIB) $(OBJ) $(LFLAGS) -o $(EXE)
$(OBJ): $(SRC)
$(COMP) -I/GnuWin32/include -c ex2.1.c
#$(COMP) -I/$(INCLUDES) -c $(SRC)
clean:
del $(TRASH)
If I type make with only the ex2.1.c present in the directory, I get the following output and error:
gcc -I/GnuWin32/include -c ex2.1.c
gcc: error: CreateProcess : No such file or directory
make: *** [ex2.1.o] Error 1
However, if I first type "gcc -I/GnuWiun32/include -c ex2.1.c", ex2.1.o is created successfully with no error. If then type 'make' I get the following output/error:
gcc -L/GnuWin32/lib ex2.1.o -lgsl -lgslcblas -lm -o ex2.1.exe
gcc: fatal error: -fuse-linker-plugin, but liblto_plugin-0.dll not found
compilation terminated
make: *** [ex2.1.exe] Error 1
But if I manually enter "gcc -L/GnuWin32/lib ex2.1.o -lgsl -lgslcblas -lm -o ex2.1.exe" then the executable compiles and runs like it should, so the problem seems to be with how make is calling gcc? My PATH variable contains the paths to both make.exe as well as gcc.exe, so I am not sure what I do not set up correctly. Does anyone have an idea of what may be wrong? Thanks.

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