I'm a bit confused how many RULES in total there are in this makefile:
edit : main.o kbd.o command.o display.o \
insert.o search.o files.o utils.o
cc -o edit main.o kbd.o command.o display.o \
insert.o search.o files.o utils.o
main.o : main.c defs.h
cc -c main.c
kbd.o : kbd.c defs.h command.h
cc -c kbd.c
command.o : command.c defs.h command.h
cc -c command.c
display.o : display.c defs.h buffer.h
cc -c display.c
insert.o : insert.c defs.h buffer.h
cc -c insert.c
search.o : search.c defs.h buffer.h
cc -c search.c
files.o : files.c defs.h buffer.h command.h
cc -c files.c
utils.o : utils.c defs.h
cc -c utils.c
clean :
rm edit main.o kbd.o command.o display.o \
insert.o search.o files.o utils.o
What I get from this is that there are 8 object files, 8 C source files and 3 header files. Would I just add those up to get the total number of rules in the Make File? Would it be 19 rules?
Hope someone can clarify this, would be greatly appreciated.
A rule in a Makefile is the things that looks like this:
target: deps
actions
i.e. the thing that says what dependencies a target has, and how to build a target from its dependencies.
To know how many rules a Makefile contains, just count them. There are 10 in your example.
Related
# this is a comment
OBJS = student.o teacher.o class.o
CC = g++
DEBUG = -g
CFLAGS = -Wall –c $(DEBUG)
LFLAGS = -Wall $(DEBUG)
myproj.exe : $(OBJS)
$(CC) $(LFLAGS) $(OBJS) –o myproj.exe
student.o : student.h student.cpp
$(CC) $(CFLAGS) student.cpp
teacher.o : teacher.h teacher.cpp
$(CC) $(CFLAGS) teacher.cpp
class.o : class.h student.h teacher.h class.cpp
$(CC) $(CFLAGS) class.cpp
can someonte tell me why does CFLAGS and LFALGS have the $(DEBUG) behind?
So you don't have to write it every time you compile or link.
Lets take these two lines from your file:
student.o : student.h student.cpp
$(CC) $(CFLAGS) student.cpp
If you didn't have $(DEBUG) in $(CFLAGS) you would have to write
student.o : student.h student.cpp
$(CC) $(CFLAGS) $(DEBUG) student.cpp
And do it for every rule and command where you want to use $(DEBUG).
I have the following Makefile. Whenever I run make, I get the following error.
ifort: error #10236: File not found: 'mkl_matrix_multiply.o'
I have been trying to figure this out for a while now with no luck.
C = icc
FC = ifort
LD = ifort
OPT = -Ofast -vec_report6 -simd -xhost -debug -traceback -ftrapuv
OP = -Ofast -vec_report6 -simd -xhost
LINK = -L$(MKLROOT)/lib/intel64 $(MKLROOT)/lib/intel64/libmkl_blas95_ilp64.a -lmkl_intel_ilp64 -lmkl_intel_thread -lmkl_core -lpthread -lm
INCLUDE = -openmp -i8 -I$(MKLROOT)/include/intel64/ilp64 -I$(MKLROOT)/include
mkl_matrix_multiply.exe: mkl_matrix_multiply.o timing.o
$(LD) -o mkl_matrix_multiply.exe mkl_matrix_multiply.o timing.o
mkl_matrix_multiply.o: mkl_matrix_multiply.f90
$(FC) $(INCLUDE) $(LINK) mkl_matrix_multiply.f90
timing.o: timing.c
$(CC) $(OP) -c timing.c
dummy.o: dummy.c
$(CC) $(OP) -c dummy.c
clean:
rm -f *.o matrix_multiply.exe
Any help would be greatly appreciated.
Seems like you are missing -c in mkl_matrix_multiply.o rule.
Modify your makefile as
C = icc
FC = ifort
LD = ifort
OPT = -Ofast -vec_report6 -simd -xhost -debug -traceback -ftrapuv
OP = -Ofast -vec_report6 -simd -xhost
LINK = -L$(MKLROOT)/lib/intel64 $(MKLROOT)/lib/intel64/libmkl_blas95_ilp64.a -lmkl_intel_ilp64 -lmkl_intel_thread -lmkl_core -lpthread -lm
INCLUDE = -openmp -i8 -I$(MKLROOT)/include/intel64/ilp64 -I$(MKLROOT)/include
mkl_matrix_multiply.exe: mkl_matrix_multiply.o timing.o
$(LD) -o mkl_matrix_multiply.exe mkl_matrix_multiply.o timing.o
mkl_matrix_multiply.o: mkl_matrix_multiply.f90
$(FC) -c $(INCLUDE) $(LINK) mkl_matrix_multiply.f90
timing.o: timing.c
$(CC) $(OP) -c timing.c
dummy.o: dummy.c
$(CC) $(OP) -c dummy.c
clean:
rm -f *.o matrix_multiply.exe
I'm getting the following error from my compiler:
g++ -c -m32 tracecone.cpp -I/usr/X11R6/include -I/usr/X11/include/GL -I/Users/owner/Documents/raytrace/Graphics -I../RayTrace -I/Users/owner/Documents/raytrace/Graphics -I/Users/owner/Documents/raytrace/VrMath -I/Users/owner/Documents/raytrace/OpenglRender -I/Users/owner/Documents/raytrace/RaytraceMgr
g++ -o -m32 tracecone ../RayTrace/RayTraceData.o tracecone.o /Users/owner/Documents/raytrace/OpenglRender/GlutRenderer.o /Users/owner/Documents/raytrace/RaytraceMgr/SceneDescription.o -L/usr/X11/lib -L/usr/X11R6/lib -L/Users/owner/Documents/raytrace/Graphics -L/Users/owner/Documents/raytrace/VrMath -lglut -lGLU -lGL -lX11 -lXext -lXmu -lXext -lXmu -lXt -lXi -lSM -lICE -lraygraph -lvrmath
i686-apple-darwin11-llvm-g++-4.2: tracecone: No such file or directory
make: *** [tracecone] Error 1
However, I am not sure which file it's saying is not there. Does it mean tracecone? or one of the library files? Either way, it looks like everything is right where it should be.
What could cause this error?
Here is my make file:
PROG = tracecone
RBASE= /Users/owner/Documents/raytrace
GDIR=$(RBASE)/Graphics
MDIR=$(RBASE)/VrMath
ODIR=$(RBASE)/OpenglRender
MANDIR=$(RBASE)/RaytraceMgr
CFLAGS = -w -s -O2 -ansi -DSHM
XLIBS = -lX11 -lXext -lXmu -lXext -lXmu -lXt -lXi -lSM -lICE
LIBS = -lglut -lGLU -lGL
RAYLIBS = -lraygraph -lvrmath
INCLS = -I/usr/X11R6/include -I/usr/X11/include/GL
INCL1 = -I$(GDIR) -I../RayTrace -I$(GDIR) -I$(MDIR) -I$(ODIR) -I$(MANDIR)
LIBDIR = -L/usr/X11/lib -L/usr/X11R6/lib -L$(GDIR) -L$(MDIR)
#source codes
SRCS = $(PROG).cpp
#substitute .cpp by .o to obtain object filenames
OBJS = $(SRCS:.cpp=.o)
#in ../Graphics
OBJOD = $(ODIR)/GlutRenderer.o
OBJO = GlutRenderer.o
OBJMAND = $(MANDIR)/SceneDescription.o
OBJMAN = SceneDescription.o
OBJ_temp = ../RayTrace/RayTraceData.o
#$< evaluates to the target's dependencies,
#$# evaluates to the target
$(PROG): $(OBJS)
g++ -o -m32 $# $(OBJ_temp) $(OBJS) $(OBJOD) $(OBJMAND) $(LIBDIR) $(LIBS) $(XLIBS) $(RAYLIBS)
$(OBJS):
g++ -c -m32 $*.cpp $(INCLS) $(INCL1)
$(OBJ1):
cd $(GDIR); g++ -m32 -c $*.cpp $(INCLS)
$(OBJM):
cd $(MDIR); g++ -m32 -c $*.cpp $(INCLS)
$(OBJO):
cd $(ODIR); g++ -m32 -c $*.cpp $(INCLS)
$(OBJMAN):
cd $(MANDIR); g++ -m32 -c $*.cpp $(INCLS)
clean:
rm $(OBJS)
clean1:
rm $(OBJD1)
Thanks in advance.
You should place your target right after -o flag:
g++ -o $# -m32 ...
Flag -o means output and in case of g++ -o tracecone ... you'll specify tracecone as output, but in case g++ -o -m32 tracecone ... you are specifying -m32 as output and tracecone as one of the object files. And g++ says that there is no such object file because there is actually no such file.
I have the following make file:
CC = gcc
CCDEPMODE = depmode=gcc3
CFLAGS = -g -O2 -W -Wall -Wno-unused -Wno-multichar
COMPONENTHEADER = Q_OBJECT
CPP = gcc -E
CPPFLAGS = -I/usr/include/Inventor/annex -D_REENTRANT -I/usr/share/qt3/include
CXX = g++
CXXCPP = g++ -E
CXXDEPMODE = depmode=gcc3
CXXFLAGS = -g -O2 -fno-exceptions -W -Wall -Wno-unused -Wno-multichar -Woverloaded- virtual
CYGPATH_W = echo
GUI = QT
Gui = Qt
INCLUDES =
LIBS = -lSoQt -lqt-mt -lXmu -lXi -lCoin -lGL -lXext -lSM -lICE -lX11 -ldl -lpthread -lm -lcxcore -lcv -lhighgui -lcvaux
OBJS = MathTools.o PointCloud.o ExtractFeatures.o Tile.o Shape.o RoadDynamic.o
SRCS = MathTools.cpp PointCloud.cpp ExtractFeatures.cpp Tile.cpp Shape.cpp RoadDynamic.cpp main.cpp
HDRS = constants.h Shape.h MathTools.h PointCloud.h ExtractFeatures.h Tile.h RoadDynamic.h
WIDGET = QWidget *
all: main
main: main.o ${OBJS}
${CC} ${CFLAGS} ${INCLUDES} -o $# main.o ${OBJS} ${LIBS}
.c.o:
${CC} ${CFLAGS} ${INCLUDES} -c $<
depend:
makedepend ${SRCS}
clean:
rm *.o core *~
tar:
tar cf code.tar Makefile *.c *.h testfile1
print:
more Makefile $(HDRS) $(SRCS) | enscript -2r -p listing.ps
I am wondering why when I run make the output is
g++ -g -O2 -fno-exceptions -W -Wall -Wno-unused -Wno-multichar -Woverloaded-virtual -I/usr/include/Inventor/annex -D_REENTRANT -I/usr/share/qt4/include -c -o main.o main.cpp
instead of:
gcc -g -O2 -W -Wall -Wno-unused -Wno-multichar ...
it seems the cxx variables are overriding the cc variables. Why is that?
also what does the "include =" do in this case? It doesn't seem to be set to anything.
Thank you
Because your object files are apparently built from .cpp files. You have no explicit rule for building .o files from .cpp files, so Make uses the implicit rule $(CXX) $(CPPFLAGS) $(CXXFLAGS) -c.
i'm trying to use GCC (linux) with a makefile to compile my project.
I get the following error :
% make map
make: *** No rule to make target `map'. Stop.
Does any one have any idea what could that be ?
This is the makefile:
CC = gcc
DEBUG_FLAG = -g
COMP_FLAG = -std=c99 -Wall -Werror -pedantic-errors -DNDEBUG
LIB = -L. -lmtm
MAP_OBJS = map.o
USER_OBJS = user.o
NETWORK_OBJS = network.o
ISOCIAL_OBJS = network.o user.o Isocial.o
PARSING_OBJS = user.o network.o map.o Isocial.o mtm_isocial.o
PARSING = parsing
MAP_TEST = map_example_test
ISOCIAL_TEST = Isocial_test
NETWORK_TEST = network_test
USER_TEST = user_test
TEST_PATH = ./tests/
$(PARSING) : $(PARSING_OBJS)
$(CC) $(DEBUG_FLAG) $(PARSING_OBJS) $(LIB) -o $#
$(MAP_TEST) : $(MAP_OBJS)
$(CC) $(DEBUG_FLAG) $(MAP_OBJS) $(LIB) -o $#
$(ISOCIAL_TEST) : $(ISOCIAL_OBJS)
$(CC) $(DEBUG_FLAG) $(ISOCIAL_OBJS) $(LIB) -o $#
$(USER_TEST) : &(USER_OBJS)
$(CC) $(DEBUG_FLAG) $(USER_OBJS) $(LIB) -o $#
$(NETWORK_TEST) : $(NETWORK_OBJS)
$(CC) $(DEBUG_FLAG) $(MAP_OBJS) $(LIB) -o $#
map.o: map.c map.h mtm_ex2.h
$(CC) -c $(DEBUG_FLAG) $(COMP_FLAG) $*.c
isocial.o: Isocial.c user.h mtm_ex2.h set.h network.h list.h Isocial.h
$(CC) -c $(DEBUG_FLAG) $(COMP_FLAG) $*.c
parsing.o: parsing.c Isocial.h parsing.h mtm_ex2.h
$(CC) -c $(DEBUG_FLAG) $(COMP_FLAG) $*.c
network.o: network.c network.h set.h mtm_ex2.h
$(CC) -c $(DEBUG_FLAG) $(COMP_FLAG) $*.c
user.o:user.c user.h set.h mtm_ex2.h
$(CC) -c $(DEBUG_FLAG) $(COMP_FLAG) $*.c
user_test.o: user_test.c ../test_utilities.h ../user.h ../mtm_ex2.h \
../set.h
$(CC) -c $(DEBUG_FLAG) $(COMP_FLAG) $(TEST_PATH)$*.c
Isocial_test.o: Isocial_test.c ../test_utilities.h ../Isocial.h
$(CC) -c $(DEBUG_FLAG) $(COMP_FLAG) $*.c $(TEST_PATH)$*.c
map_example_test.o: map_example_test.c ../test_utilities.h ../map.h
$(CC) -c $(DEBUG_FLAG) $(COMP_FLAG) $*.c $(TEST_PATH)$*.c
network_test.o: network_test.c ../test_utilities.h ../network.h ../set.h \
../mtm_ex2.h
$(CC) -c $(DEBUG_FLAG) $(COMP_FLAG) $*.c $(TEST_PATH)$*.c
EXEC = $(PARSING) $(MAP_TEST) $(ISOCIAL_TEST $(USER_TEST) $(NETWORK_TEST)
tests : $(MAP_TEST) $(ISOCIAL_TEST) $(USER_TEST) $(NETWORK_TEST)
isocial : $(PARSING)
clean:
rm -f $(PARSING_OBJS) $(EXEC)
The error message is correct: I see a target for map.o, but there's no target for map, which would look like
map: map.o
something something something
There are targets for programs named parsing, map_example_test, network_test, and Isocial_test; perhaps you want to build one of those?
If you just typed make, it would build the program parsing, as that's the first target in the file.