In attempt to build sip from source packages, I have the infinite loop on a building step. I run make.exe and it takes the following steps unitl I press Ctrl+Brake:
cd sipgen
make
make[1]: Entering directory `C:/sip'
cd sipgen
make
make[2]: Entering directory `C:/sip'
cd sipgen
make
make[3]: Entering directory `C:/sip'
cd sipgen
make
make[4]: Entering directory `C:/sip'
...........................................
cd sipgen
make
make[n]: Entering directory `C:/sip'
^C
Makefile in root directory contains code below:
all:
cd sipgen
$(MAKE)
#cd ..
cd siplib
$(MAKE)
#cd ..
install:
cd sipgen
$(MAKE) install
#cd ..
cd siplib
$(MAKE) install
#cd ..
#if not exist C:\Python34\Lib\site-packages mkdir C:\Python34\Lib\site-packages
copy /y sipconfig.py C:\Python34\Lib\site-packages\sipconfig.py
copy /y C:\sip\sipdistutils.py C:\Python34\Lib\site-packages\sipdistutils.py
clean:
cd sipgen
$(MAKE) clean
#cd ..
cd siplib
$(MAKE) clean
#cd ..
Do you know the reasons?
Can I solve this issue, or it impossible on Windows?
PS. Sorry for my awful English
I just copy the answer of another question
If you use python configure.py, the generated Makefiles are actually nmake makefiles. nmake is Microsoft's equivalent to make. You can run it by invoking nmake in a Visual Studio command prompt, if you have that installed.
For building with mingw, you have to indicate that you want to use that particular platform when creating the makefiles, as follows:
python configure.py --platform win32-g++
After that, invoking make works fine.
https://stackoverflow.com/a/16051239
If you use the PyQt windows installer the sip package will be installed too!
Related
I'm trying to clone a repository from git and compile it locally. The relevant part of the Makefile is pasted below.
BUILDDIR = $(PWD)/build
# rest of the Makefile
...
all: release
release: $(BUILDDIR)/buildr/Makedir $(BUILDDIR)/depqbf
$(BUILDDIR)/buildr/Makedir:
mkdir -p $(BUILDDIR)/buildr
$(BUILDDIR)/depqbf:
cd $(BUILDDIR); rm -rf depqbf; git clone git#github.com:lonsing/depqbf.git
cd $(BUILDDIR)/depqbf;./compile.sh
The problem is if I use rm -rf depqbf, the compilation process happens everytime I run make.
If I remove it, and perform make again
fatal: destination path 'depqbf' already exists and is not an empty directory.
Is it possible to only clone and compile if the directory is not present.
the compilation process happens everytime I run make
The target of your recipe:
$(BUILDDIR)/depqbf/depqbf:
cd $(BUILDDIR); rm -rf depqbf; git clone git#github.com:lonsing/depqbf.git
cd $(BUILDDIR)/depqbf;./compile.sh
is the file $(BUILDDIR)/depqbf/depqbf. You are telling Make that, if the target $(BUILDDIR)/depqbf/depqbf
does not exist, then Make is to make the target by running the commands:
cd $(BUILDDIR); rm -rf depqbf; git clone git#github.com:lonsing/depqbf.git
cd $(BUILDDIR)/depqbf;./compile.sh
But those commands never create a file called $(BUILDDIR)/depqbf/depqbf. They
never make the target.
So every time Make considers the target it will decide that it has to made, by
running those commands.
If you remove rm -rf depqbf, then when Make attempts the target:
fatal: destination path 'depqbf' already exists and is not an empty directory.
Naturally, because you cannot clone into an existing non empty-directory. This is
not connected with the fact that the recipe is always being run. It is always being run
because it never makes its target.
Your other recipe:
$(BUILDDIR)/buildr/Makedir:
mkdir -p $(BUILDDIR)/buildr
likewise is one that that never makes it target. The command:
mkdir -p $(BUILDDIR)/buildr
will never create the file $(BUILDDIR)/buildr/Makedir. I do not see the purpose
of this recipe, so I'll assume it is just supposed to create the file
$(BUILDDIR)/buildr/Makedir if it does not exist, for some reason.
Then this makefile will attempt to make the targets if and only if they don't exist:
Makefile
BUILDDIR := $(PWD)/build
.PHONY: all release
all: release
release: $(BUILDDIR)/buildr/Makedir $(BUILDDIR)/depqbf
$(BUILDDIR)/buildr/Makedir: | $(BUILDDIR)/buildr
touch $#
$(BUILDDIR)/depqbf: | $(BUILDDIR)
cd $(dir $#); git clone git#github.com:lonsing/depqbf.git
cd $#; ./compile.sh
$(BUILDDIR) $(BUILDDIR)/buildr:
mkdir -p $#
Useful references in The GNU Make manual:-
An Introduction to Makefiles
Phony Targets
Types of Prerequisites
Automatic Variables
I have a very simple makefile that I ported from Linux to Windows
it only goes inside subfolders and calls other makefiles
all:
$(MAKE) clean
#(cd apps; $(MAKE))
clean:
cd apps; $(MAKE) clean;
the problem is that I don't understand how the #(command1; command2; command3;) syntax works and I'm unable to make it work even with the simplest of commands
For instance
all:
dir
works fine and it outputs the contents of the directory (and I'm in the right one)
all:
cd apps; dir
Does not work, it outputs
cd apps; dir The system cannot find the path specified.
Even worse if I keep the parentheses:
all:
#(dir)
outputs
process_begin: CreateProcess(NULL, (dir), ...) failed. make (e=2): The
system cannot find the file specified.
Can somebody please point me to the proper documentation? I know it must be very simple but all the guesswork so far failed and the documentation is too huge to read it all. I tried but I couldn't find what I'm looking for
Thanks
I'm trying to debug a custom Makefile from an open source C++ project. It's not recognizing any targets I make in the "Make Target" view.
I've triple checked the spelling of my targets and they're fine.
If I turn on "Generate Makefiles automatically" it will successfully call the "all" and "clean" targets, but no other targets.
I assume you are using Eclipse/CDT.
Don't choose automatically generate Makefile.
Instead, right click on the makefile and select Make Targets/create. Use the target names from the makefile. The targets will appear in the "Make Targets" window (Window/Show View/MakeTarget). You can then build any of the targets using the hammer symbol in the make targets window.
Glad that solved your problem. By the way you don't have to have the make file in the same location as your source files. Here is an example where we use a make file in one directory that uses cd to run make files in other directories:
all: subsystems
subsystems:
#cd Efficiency && $(MAKE)
#cd List && $(MAKE)
#cd Map && $(MAKE)
#cd Set && $(MAKE)
#cd UsingSTLEfficiently && $(MAKE)
#cd VectorAndArray && $(MAKE)
I finally managed to compile a program in Windows, which took a while and would have not been possible without some help from here. It all works now, except: "make clean" yields
/bin/sh: del: command not found
Makefile:44: recipe for target `clean' failed
make: *** [clean] Error 127
In the makefile, the clean command looks like
clean:
del /S *.o *~ *.out [...], eliminating all resulting .o and executables resulting from make.
mingw64 is in the path, and I tried with cygwin/bin in the path and without, both with the same result. "Make" was done with mingw32-make in msys. I also tried "mingw-32-make clean" in msys, still no luck; I am also not sure if "make clean" is supported in Cygwin at all. I run the whole thing on Windows 7, 64 bit.
How can I fix this problem?
It seems like you are mixing your platforms. del is a cmd.exe builtin, which is why it cannot be found by Bash. The analog to del is rm.
Try running make under cmd.exe
or
editing the Makefile, replacing del /S with rm -f
It is also possible to create a file called makefile.defs in you project folder and overwrite the makefile variable RM which is automatically set to "del" by eclipse. The file is included by "makefile" in the [Name of Config] folder
my File just contains:
RM := rm -rf
This works fine for me.
I have a working makefile that builds with mingw32. Now i renamed that makefile to Makefile.w32 (source -> http://pastie.org/319964)
Now i have a Makefile with the following. The problem is, it does not build my source
all:
make mingw32
clean:
#echo "causes an infinite loop -> make mingw32 clean"
mingw32:
#echo "yeahhhhhhhhh"
make Makefile.w32
mingw32-clean:
#echo "mingw clean"
make Makefile.w32 clean
result:
> "make"
make mingw32
make[1]: Entering directory `/c/nightly/test'
yeahhhhhhhhh
make Makefile.w32
make[2]: Entering directory `/c/nightly/test'
make[2]: Nothing to be done for `Makefile.w32'.
make[2]: Leaving directory `/c/nightly/test'
make[1]: Leaving directory `/c/nightly/test'
It seems to me it doesn't like Makefile.w32 extension. I dont understand why it isn't building. It;s obviously getting to my "make Makefile.w32" line.
"make Makefile.w32" is looking for a target named Makefile.w32, not a make file by that name. To run make and tell it to read the make file "Makefile.w32", use the -f switch:
make -f Makefile.w32
Edit: Incidentally, why do you launch a separate instance of make in the "all" target, if all you want is for "all" to depend on the "mingw32" target in the same make file? It'd be better, IMHO, to declare it as a dependent target instead:
all: mingw32
Likewise with "clean" and "mingw32-clean":
clean: mingw32-clean
You can use cmake to generate makefiles. It should work on most platforms.